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"huang jiao wei"
Showing items 1-4 of 4 (1 Page(s) Totally) 1 View [10|25|50] records per page
臺大學術典藏 |
2020-05-04T07:27:48Z |
Hierarchical memory scheduling for multimedia MPSoCs.
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Lin, Ye-Jyun;Yang, Chia-Lin;Lin, Tay-Jyi;Huang, Jiao-Wei;Chang, Naehyuck; Lin, Ye-Jyun; Yang, Chia-Lin; Lin, Tay-Jyi; Huang, Jiao-Wei; Chang, Naehyuck; CHIA-LIN YANG |
臺大學術典藏 |
2020-05-04T07:27:48Z |
Hierarchical memory scheduling for multimedia MPSoCs.
|
Lin, Ye-Jyun;Yang, Chia-Lin;Lin, Tay-Jyi;Huang, Jiao-Wei;Chang, Naehyuck; Lin, Ye-Jyun; Yang, Chia-Lin; Lin, Tay-Jyi; Huang, Jiao-Wei; Chang, Naehyuck; CHIA-LIN YANG |
臺大學術典藏 |
2020-05-04T07:27:46Z |
Memory access aware power gating for MPSoCs.
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Lin, Ye-Jyun; Lin, Ye-Jyun;Yang, Chia-Lin;Huang, Jiao-Wei;Chang, Naehyuck; Yang, Chia-Lin; Huang, Jiao-Wei; Chang, Naehyuck; CHIA-LIN YANG |
臺大學術典藏 |
2020-05-04T07:27:46Z |
Memory access aware power gating for MPSoCs.
|
Lin, Ye-Jyun; Lin, Ye-Jyun;Yang, Chia-Lin;Huang, Jiao-Wei;Chang, Naehyuck; Yang, Chia-Lin; Huang, Jiao-Wei; Chang, Naehyuck; CHIA-LIN YANG |
Showing items 1-4 of 4 (1 Page(s) Totally) 1 View [10|25|50] records per page
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