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Showing items 11-16 of 16 (1 Page(s) Totally)
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| 國立臺灣大學 |
2005-02 |
製程偏移對可測試性設計技術效能影響的評估
|
陳逸任; 黃俊郎; Chen, Yi-Ren; Huang, Jiun-Lang |
| 臺大學術典藏 |
2005-02 |
製程偏移對可測試性設計技術效能影響的評估
|
Chen, Yi-Ren; Huang, Jiun-Lang; 陳逸任; 黃俊郎; Chen, Yi-Ren; Huang, Jiun-Lang |
| 國立臺灣大學 |
2005 |
A Fabrication Process Variation Based Approach to Evaluate Design-for-Test Techniques
|
Chen, Yi-Ren; Huang, Jiun-Lang |
| 國立臺灣大學 |
2003-11 |
A low-cost jitter measurement technique for BIST applications
|
Huang, Jui-Jer; Huang, Jiun-Lang |
| 國立臺灣大學 |
2003 |
Practical Considerations in Applying-Modulation-Based Analog BIST to Sampled-Data Systems
|
Hong, Hao-Chiao; Huang, Jiun-Lang; Cheng, Kwang-Ting; Wu, Cheng-Wen; Kwai, Ding-Ming |
| 臺大學術典藏 |
2003 |
Practical Considerations in Applying-Modulation-Based Analog BIST to Sampled-Data Systems
|
Hong, Hao-Chiao; Huang, Jiun-Lang; Cheng, Kwang-Ting; Wu, Cheng-Wen; Kwai, Ding-Ming; Hong, Hao-Chiao; Huang, Jiun-Lang; Cheng, Kwang-Ting; Wu, Cheng-Wen; Kwai, Ding-Ming |
Showing items 11-16 of 16 (1 Page(s) Totally)
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