臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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	Repositories
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	2019臺灣學術機構典藏研討會
	機構典藏系統RC7版本已發佈

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Institution	Date	Title	Author
國立中山大學	2008-07	A Retargetable Embedded In-circuit Emulation Module for Microprocessors	I.J. Huang;C.F. Kao;H.M. Chen;J.N. Ruan;T.A. Lu
國立中山大學	2003-12	Reconfigurable Real-Time Address Trace Compressor for Embedded Microprocessors	S.M. Huang; I.J. Huang; C.F. Kao
國立中山大學	2003-09	Automatic Assembly Program Retargeting for Microcontrollers	I.J. Huang;D.Z. Chen
國立中山大學	2003-08	Exploration and Analysis of Dynamic and Static Co-debugging System for SoC	S.M. Huang; I.J. Huang; T.C. Yeh
國立中山大學	2003-08	A Reusable and Parameterized Program Flow Compressor for On-Chip Trace System	S.M. Huang; I.J. Huang; P.C. Chen
國立中山大學	2002-11	Design Exploration of an Industrial Embedded Microcontroller: Performance, Cost and Software Compatibility	I.J. Huang;L.R. Wang;Y.M. Wang;T.A. Lu
國立中山大學	2002-08	On-chip Debugging for Microcontroller with Multimedia Extension	I.J. Huang; S.M. Huang; W.K. Huang; C.F. Kao
國立中山大學	2002-06	Analysis of x86 Instruction Set Usage for DOS/Windows Applications and Its Implication on Superscalar Design	I.J. Huang;T.C. Peng
國立中山大學	2002-05-26	A Cost Effective Multimedia Extension to ARM7 Microprocessors	I.J. Huang; W.K. Huang; R.T. Gu; C.F. Kao
國立中山大學	2002-01-28	Analysis of Hardware and Software Approaches to In-circuit Emulation of Microprocessor	H.M. Chen; C.F. Kao; I.J. Huang
國立中山大學	2002	Design and Analysis of Hardware Acceleration for Ethernet TCP/IP Checksum Computation	I.J. Huang; R.T. Gu; G.J. Chen
國立中山大學	2001-10-18	A Retargetable Instruction Test Pattern Generator for Microprocessors	P. Mu; I.J. Huang
國立中山大學	2001-08	Analysis of Hardware and Software Approaches to In-circuit Emulation of Microprocessor	H.M. Chen; I.J. Huang; W.C. Wang
國立中山大學	2001-08	A Parameterized MMX IP Module for RISC Microprocessors	I.J. Huang; W.K. Huang; C.F. Kao
國立中山大學	2001-01-31	Parameterized MAC Unit Implementation	M.C. Chen; I.J. Huang; C.H. Chen
國立中山大學	2001-01-31	Reusable Embedded In-Circuit Emulator	I.J. Huang; H.M. Chen; C.F. Kao
國立中山大學	2001-01	Co-Synthesis of Pipeline Structures and Instruction Reordering Constraints for Instruction Set Processors	I.J. Huang
國立中山大學	2001	Application of Instruction Analysis/Scheduling Techniques to Resource Allocation of Superscalar Processors	I.J. Huang;P.H. Xie
國立中山大學	2000-12	Cost-Effective Microarchitecture Optimization of the ARMTDMI Microprocessor	I.J. Huang; Y.L. Hung
國立中山大學	2000-1	A New Approach to Assembly Software Retargeting for Microcontrollers	I.J. Huang; D.Z. Chen
國立中山大學	2000-09	A Parameterized Ethernet Media Access Controller Soft IP	M.C. Chen;I.J. Huang
國立中山大學	2000-08	Exploration of Multiple ICE's for Embedded Micro-processor Cores in an SOC Chip	I.J. Huang; C.F. Kao
國立中山大學	2000-08	Reusable Embedded In-Circuit Emulator for a Micro-controller Core in an SOC	C.F. Kao; I.J. Huang; H.M. Chen
國立中山大學	2000-08	Exploration of Multiple ICE's for Embedded Microprocessor Cores in an SoC Chip	I.J. Huang; C.F. Kao
國立中山大學	2000-08	MAC IP and Its Development	M.C. Chen; I.J. Huang

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