臺大學術典藏 |
2018-09-10T09:24:48Z |
Turn-off Transient Behavior of 40nm PD SOI NMOS Device Considering the Floating Body Effect
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S. W. Fang; J. B. Kuo; D. Chen; C. S. Yeh; JAMES-B KUO |
臺大學術典藏 |
2018-09-10T09:24:48Z |
Floating-Body Kink Effect: Ply-Si TFT versus SOI CMOS
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T. C. Liu;J. B. Kuo;S. D. Zhang; T. C. Liu; J. B. Kuo; S. D. Zhang; JAMES-B KUO |
臺大學術典藏 |
2018-09-10T09:24:48Z |
Floating-Body Kink Effect: Ply-Si TFT versus SOI CMOS
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T. C. Liu;J. B. Kuo;S. D. Zhang; T. C. Liu; J. B. Kuo; S. D. Zhang; JAMES-B KUO |
臺大學術典藏 |
2018-09-10T09:24:48Z |
Design of Distortionless Interconnects via Main/auxiliary Structure with LC Line for High Speed On-chip Transmission
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T. C. Liu;J. B. Kuo;S. D. Zhang; T. C. Liu; J. B. Kuo; S. D. Zhang; JAMES-B KUO |
臺大學術典藏 |
2018-09-10T09:24:48Z |
Design of Distortionless Interconnects via Main/auxiliary Structure with LC Line for High Speed On-chip Transmission
|
T. C. Liu;J. B. Kuo;S. D. Zhang; T. C. Liu; J. B. Kuo; S. D. Zhang; JAMES-B KUO |
臺大學術典藏 |
2018-09-10T08:46:16Z |
Modeling the Floating-Body-Effect-Related Transient Behavior of 40nm PD SOI NMOS Device via the SPICE Bipolar/MOS Model
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S. W. Fang; J. B. Kuo; D. Chen; C. S. Yeh; JAMES-B KUO |
臺大學術典藏 |
2018-09-10T08:46:16Z |
A Novel Low-Voltage Silicon-On-Insulator (SOI) CMOS Complementary Pass-Transistor Logic (CPL) Circuit using Asymmetrical Dynamic Threshold Pass-Transistor (ADTPT) Technique
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J. B. Kuo;B. T. Wang; J. B. Kuo; B. T. Wang; JAMES-B KUO |
臺大學術典藏 |
2018-09-10T08:46:16Z |
A Novel Low-Voltage Silicon-On-Insulator (SOI) CMOS Complementary Pass-Transistor Logic (CPL) Circuit using Asymmetrical Dynamic Threshold Pass-Transistor (ADTPT) Technique
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J. B. Kuo;B. T. Wang; J. B. Kuo; B. T. Wang; JAMES-B KUO |
臺大學術典藏 |
2018-09-10T08:46:16Z |
A Charge-Sharing-Problem-Free 1.5V BiCMOS Dynamic Logic Gate Circuit
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J. B. Kuo; J. B. Kuo; JAMES-B KUO |
臺大學術典藏 |
2018-09-10T08:46:16Z |
A Charge-Sharing-Problem-Free 1.5V BiCMOS Dynamic Logic Gate Circuit
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J. B. Kuo; J. B. Kuo; JAMES-B KUO |
臺大學術典藏 |
2018-09-10T08:46:15Z |
Analysis of Turn-off Transient Behavior of the 40nm PD SOI NMOS Device with the Floating Body Effect
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C. H. Chen; J. B. Kuo; D. Chen; C. S. Yeh; JAMES-B KUO |
臺大學術典藏 |
2018-09-10T08:18:06Z |
Gate tunneling leakage current behavior of 40 nm PD SOI NMOS device considering the floating body effect
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H. J. Hung;J. B. Kuo;D. Chen;C. S. Yeh; H. J. Hung; J. B. Kuo; D. Chen; C. S. Yeh; JAMES-B KUO |
臺大學術典藏 |
2018-09-10T08:18:06Z |
Gate tunneling leakage current behavior of 40 nm PD SOI NMOS device considering the floating body effect
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H. J. Hung;J. B. Kuo;D. Chen;C. S. Yeh; H. J. Hung; J. B. Kuo; D. Chen; C. S. Yeh; JAMES-B KUO |
臺大學術典藏 |
2018-09-10T08:18:06Z |
Modeling the Floating-Body-Effect-Induced Drain Current Behavior of 40nm PD SOI NMOS Device Via SPICE BJT/MOS Model Approach
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J. S. Su;J. B. Kuo;D. Chen;C. S. Yeh; J. S. Su; J. B. Kuo; D. Chen; C. S. Yeh; JAMES-B KUO |
臺大學術典藏 |
2018-09-10T08:18:06Z |
Modeling the Floating-Body-Effect-Induced Drain Current Behavior of 40nm PD SOI NMOS Device Via SPICE BJT/MOS Model Approach
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J. S. Su;J. B. Kuo;D. Chen;C. S. Yeh; J. S. Su; J. B. Kuo; D. Chen; C. S. Yeh; JAMES-B KUO |
臺大學術典藏 |
2018-09-10T08:18:06Z |
Low-Voltage SOI CMOS DTMOS/MTCMOS Circuit Technique for Design Optimization of Low-power SOC Applications
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W.C.H. Lin;J. B. Kuo; W.C.H. Lin; J. B. Kuo; JAMES-B KUO |
臺大學術典藏 |
2018-09-10T08:18:06Z |
Low-Voltage SOI CMOS DTMOS/MTCMOS Circuit Technique for Design Optimization of Low-power SOC Applications
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W.C.H. Lin;J. B. Kuo; W.C.H. Lin; J. B. Kuo; JAMES-B KUO |
臺大學術典藏 |
2018-09-10T08:18:06Z |
Modeling the parasitic bipolar device in the 40nm PD SOI NMOS device considering the floating body effect
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C. H. Chen;J. B. Kuo;D. Chen;C. S. Yeh; C. H. Chen; J. B. Kuo; D. Chen; C. S. Yeh; JAMES-B KUO |
臺大學術典藏 |
2018-09-10T08:18:06Z |
Modeling the parasitic bipolar device in the 40nm PD SOI NMOS device considering the floating body effect
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C. H. Chen;J. B. Kuo;D. Chen;C. S. Yeh; C. H. Chen; J. B. Kuo; D. Chen; C. S. Yeh; JAMES-B KUO |
臺大學術典藏 |
2018-09-10T08:18:06Z |
Charge Pumping Behavior of STI-Isolated PD SOI NMOS Device Operating at Low Temp
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C. F. Yen;J. B. Kuo; C. F. Yen; J. B. Kuo; JAMES-B KUO |
臺大學術典藏 |
2018-09-10T08:18:06Z |
Charge Pumping Behavior of STI-Isolated PD SOI NMOS Device Operating at Low Temp
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C. F. Yen;J. B. Kuo; C. F. Yen; J. B. Kuo; JAMES-B KUO |
臺大學術典藏 |
2018-09-10T08:18:05Z |
Shallow trench isolation-related narrow channel effect on the kink behaviour of 40 nm PD SOI NMOS device
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H. J. Hung;J. B. kuo;D. Chen;C. T. Tsai;C. S. Yeh; H. J. Hung; J. B. kuo; D. Chen; C. T. Tsai; C. S. Yeh; JAMES-B KUO |
臺大學術典藏 |
2018-09-10T08:18:05Z |
Shallow trench isolation-related narrow channel effect on the kink behaviour of 40 nm PD SOI NMOS device
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H. J. Hung;J. B. kuo;D. Chen;C. T. Tsai;C. S. Yeh; H. J. Hung; J. B. kuo; D. Chen; C. T. Tsai; C. S. Yeh; JAMES-B KUO |
臺大學術典藏 |
2018-09-10T07:41:38Z |
Compact Modelign of Nanometer SOI CMOS Devices Considering Shallow Trench Isolation
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J. B. Kuo; J. B. Kuo; JAMES-B KUO |
臺大學術典藏 |
2018-09-10T07:41:38Z |
Compact Modelign of Nanometer SOI CMOS Devices Considering Shallow Trench Isolation
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J. B. Kuo; J. B. Kuo; JAMES-B KUO |