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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
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Showing items 116-125 of 176  (18 Page(s) Totally)
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Institution Date Title Author
臺大學術典藏 2018-09-10T07:08:18Z Analysis of STI-induced mechanical stress-related Kink effect of 40 nm PD SOI NMOS devices biased in saturation region I. S. Lin;J. B. Kuo; I. S. Lin; J. B. Kuo; JAMES-B KUO
臺大學術典藏 2018-09-10T07:08:18Z Analysis of STI-induced mechanical stress-related Kink effect of 40 nm PD SOI NMOS devices biased in saturation region I. S. Lin;J. B. Kuo; I. S. Lin; J. B. Kuo; JAMES-B KUO
臺大學術典藏 2018-09-10T07:08:18Z STI-Induced Mechanical-Stress-Related Kink Effect of 40nm PD SOI NMOS Devices I. S. Lin; V. C. Su; J. B. Kuo; D. Chen; C. S. Yeh; C. T. Tsai; M. Ma; JAMES-B KUO
臺大學術典藏 2018-09-10T07:08:18Z Analysis of STI Mechanical-Stress Induced Effects of Nanometer PD SOI NMOS Devices J. B. Kuo; J. B. Kuo; JAMES-B KUO
臺大學術典藏 2018-09-10T07:08:18Z Analysis of STI Mechanical-Stress Induced Effects of Nanometer PD SOI NMOS Devices J. B. Kuo; J. B. Kuo; JAMES-B KUO
臺大學術典藏 2018-09-10T07:08:18Z STI-Induced Mechanical Stress-Related Breakdown Behavior of 40nm PD SOI NMOS Devices J. B. Kuo; D. Chen; C. S. Yeh; C. T. Tsai; M. Ma; JAMES-B KUO
臺大學術典藏 2018-09-10T06:35:01Z Modeling the Drain Current of DG FD SOI NMOS Devices with N+/P+ Top/Bottom Gate C. H. Hsu; J. B. Kuo; JAMES-B KUO
臺大學術典藏 2018-09-10T06:35:00Z Triple Threshold Static Power Minimization in High-Level Synthesis of VLSI CMOS H. Chen; J. B. Kuo; M. Syrzycki; JAMES-B KUO
臺大學術典藏 2018-09-10T06:35:00Z Low-Voltage Single-Phase Clocking Adiabatic DCVS Logic Circuit with Pass Gate Logic E. K. Loo; J. B. Kuo; M. Syrzycki; JAMES-B KUO
臺大學術典藏 2018-09-10T06:35:00Z Modeling the Gate Tunneling Current Effects of Sub-100nm NMOS Devices with an Ultra-thin (1nm) Gate Oxide J. B. Kuo; JAMES-B KUO

Showing items 116-125 of 176  (18 Page(s) Totally)
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