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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
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Institution Date Title Author
南台科技大學 2005-11 Alternative processing order with efficient architecture for adaptive deblocking filter in h. 264/avc C. M. Chen; C. H. Chen; J. P. Zeng; Y. P. Chang; J. J. Tang
南台科技大學 2005 The annealing effects of GaN MIS capacitors with photo-CVD oxide layers Y. Z. Chiou; Y. K. Su; S. J. Chang; C. K. Wang; J. J. Tang
南台科技大學 2004-09 5. 2GHz power amplifier with diode linearizer C. H. Hsieh; W. S. Chen; F. M. Hsieh; J. J. Tang
南台科技大學 2004-09 A 5. 2GHz SiGe/Si HBT-based MMIC power amplifier using on-chip linearizer M. S. Yang; R. J. You; W. S. Chen; J. J. Tang
南台科技大學 2004 Noise Analysis of AlGaN/GaN MOS-HFETs with Photochemical-Vapor Deposition SiO2 Layer Y. Z. Chiou; C. K. Wang; S. J. Chang; Y. K. Su; C. S. Chang; T. K. Lin; T. H. Fang; J. J. Tang
南台科技大學 2004 A 5.2GHz SiGe/Si HBT-based MMIC power amplifier using on-chip linearizer M. S. Yang; R. J. You; W. S. Chen; J. J. Tang
南台科技大學 2004 5.2GHz power amplifier with diode linearizer C. H. Hsieh; W. S. Chen;F. M. Hsieh ; J. J. Tang
南台科技大學 2000-05 An Efficient Placement and Global Routing Algorithm for Hierarchical FPGAs J. J. Tang; B. C. Wang
南台科技大學 1999-11 An accurate logic threshold voltage determination model for CMOS circuits to facilitate test pattern generation and fault simulation J. J. Tang
南台科技大學 1999-08 A 1 V built-in intermediate voltage sensor J. J. Tang; 唐經洲
南台科技大學 1999-08 A 30-V Row/Column Driver for PSCT/LCD using High-Voltage BiMOS Process J. J. Tang; B. D. Liu; J. R. Wu
南台科技大學 1998-12 Determination of threshold voltage for CMOS gates to facilitate test pattern generation and fault simulation K. J. Lee; J. J. Tang
南台科技大學 1998-12 On the determination of threshold voltages for CMOS gate to facilitate test pattern generation and fault simulation K. J. Lee; J. J. Tang
南台科技大學 1998-10 A new representation for programmable logic arrays to facilitate testing and logic design J. J. Tang; K. J. Lee; B. D. Liu;唐經洲; Jing-Jou Tang
南台科技大學 1998-05 An Internet-aided system for writing conference in senior high school J. J. Tang; S. M. Kao; L. M. Huang
南台科技大學 1997-09 Track assignment algorithm for an FPGA with hierarchical interconnection structure B. T. Wang; J. J. Tang
南台科技大學 1997-09 An IDDQ testable design for PLA J. J. Tang
南台科技大學 1997-04 An IDDQ testable design for PLA. J. J. Tang
南台科技大學 1997-03 A case study on using writing conferences and peer-group review in teaching English composition in senior high school J. J. Tang; L. M. Huang
南台科技大學 1996-09 Low test-application time method for EEPLA testing B. D. Liu; K. C. Wei; J. J. Tang;唐經洲; Jing-Jou Tang
南台科技大學 1996-01 Two modeling techniques for CMOS Circuits to enhance test generation and fault simulation for bridging faults K. J. Lee; J. J. Tang; 唐經洲
南台科技大學 1995-05 An IDDQ fault model to facilitate the design of built-in current sensor (BICSs) B. D. Liu; J. J. Tang; K. J. Lee
南台科技大學 1994-08 Bulit-in intermediate voltage testing for CMOS circuits K. J. Lee; J. J. Tang
南台科技大學 1994-08 EDEn- An integrated mixed-mode IC design environment Y. M. Lin; M. C. Jiang; W. Y. Lin; W. T. Chen; M. C. Hsiao; J. J. Tang; M. J. Wu; W. H. Luo; H. T. Chung; J. H. Chen; S. C. Liau
南台科技大學 1994-01 Physical fault consideration of test pattern generation for large embeeded PLAs B. D. Liu; J. J. Tang; K. J. Lee

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