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Showing items 11-35 of 72  (3 Page(s) Totally)
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Institution Date Title Author
臺大學術典藏 2018-09-10T09:50:52Z On guaranteeing capture safety in at-speed scan testing with broadcast-scan-based test compression K. Enokimoto;X. Wen;K. Miyase;J.-L. Huang;S. Kajihara;L.-T. Wang; K. Enokimoto; X. Wen; K. Miyase; J.-L. Huang; S. Kajihara; L.-T. Wang; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T09:25:31Z Launch-on-Shift Test Generation for Testing Scan Designs Containing Synchronous and Asynchronous Clock Domains, S. Wu;L. T. Wang;X. Wen;W. B. Jone;M. S. Hsiao;F. Li;J. C. M. Li;J. L. Huang; S. Wu; L. T. Wang; X. Wen; W. B. Jone; M. S. Hsiao; F. Li; J. C. M. Li; J. L. Huang; CHIEN-MO LI; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T09:25:29Z An MCT-Based Bit-Weight Extraction Technique for Embedded SAR ADC Testing and Calibration X.-L. Huang;J.-L. Huang;H.-I. Chen;C.-Y. Chen;K.-T. Tseng;M.-F. Huang;Y.-F. Chou;D.-M. Kwai; X.-L. Huang; J.-L. Huang; H.-I. Chen; C.-Y. Chen; K.-T. Tseng; M.-F. Huang; Y.-F. Chou; D.-M. Kwai; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T09:25:29Z A SAR ADC missing-decision level detection and removal technique X.-L. Huang;J.-L. Huang;Y.-F. Chou;D.-M. Kwai; X.-L. Huang; J.-L. Huang; Y.-F. Chou; D.-M. Kwai; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T09:25:29Z A fault-tolerant PE array based matrix multiplier design B.-Y. Jan;J.-L. Huang; B.-Y. Jan; J.-L. Huang; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T09:25:29Z A transition isolation scan cell design for low shift and capture power Y.-T. Lin;J.-L. Huang;X. Wen; Y.-T. Lin; J.-L. Huang; X. Wen; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T09:25:29Z Pre-bond characterization of 1-bit/stage pipelined ADC for 3D-IC applications Y.-H. Chou;J.-L. Huang;X.-L. Huang; Y.-H. Chou; J.-L. Huang; X.-L. Huang; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T08:47:22Z Clock-Gating-Aware Low Launch WSA Test Pattern Generation for At-Speed Scan Testing Y.-T. Lin; J.-L. Huang; X. Wen; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T08:47:21Z ADC/DAC Loopback Linearity Testing by DAC Output Offsetting and Scaling X.-L. Huang; J.-L. Huang; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T08:47:21Z Robust Circuit Design for Flexible Electronics T.-C Huang; J.-L. Huang; K.-T. Cheng; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T08:47:21Z A self-testing and calibration method for embedded successive approximation register ADC X.-L. Huang; P.-Y. Kang; H.-M. Chang; J.-L. Huang; Y.-F. Chou; Y.-P. Lee; D.-M. Kwai; C.-W. Wu; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T08:47:21Z Broadcast test pattern generation considering skew-insertion and partial-serial scan C.-J. Lin; J.-L. Huang; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T08:47:21Z Sigma-delta modulation based wafer-level testing for TFT-LCD source driver ICs W.-A. Lin; C.-C. Li; J.-L. Huang; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T08:47:21Z A pre- and post-bond self-testing and calibration methodology for SAR ADC Array in 3-D Imager X.-L. Huang; P.-Y. Kang; J.-L. Huang; Y.-F. Chou; Y.-P. Lee; D.-M. Kwai; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T08:19:07Z An Error Tolerance Scheme for 3D CMOS Imagers H.-M. Sherman Chang;J.-L. Huang;D.-M. Kwai;K.-T. Tim Cheng;C.-W. Wu; H.-M. Sherman Chang; J.-L. Huang; D.-M. Kwai; K.-T. Tim Cheng; C.-W. Wu; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T08:19:07Z A scalable quantitative measure of IR-drop for scan pattern generation M.-F. Wu;K.-H. Tsai;W.-T. Cheng;H.-C. Pan;J.-L. Huang;A. Kifli; M.-F. Wu; K.-H. Tsai; W.-T. Cheng; H.-C. Pan; J.-L. Huang; A. Kifli; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T08:19:07Z Power supply noise reduction in broadcast-based compression environment for at-speed scan testing C.-Y. Liang;M.-F. Wu;J.-L. Huang; C.-Y. Liang; M.-F. Wu; J.-L. Huang; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T08:19:06Z An Improved Weight Assignment Scheme for IR-Drop-Aware At-Speed Scan Pattern Generation M.-F. Wu;H.-C. Pan;T.-H. Wang;J.-L. Huang;K.-H. Tsai;W.-T. Cheng; M.-F. Wu; H.-C. Pan; T.-H. Wang; J.-L. Huang; K.-H. Tsai; W.-T. Cheng; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T08:19:06Z A robust ADC code hit counting technique J.-L. Huang;Kuo-Yu Chou;Ming-Huan Lu;Xuan-Lun Huang; J.-L. Huang; Kuo-Yu Chou; Ming-Huan Lu; Xuan-Lun Huang; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T08:19:06Z 3D-PIC: An Error Tolerant 3D CMOS Imager H.-M. Sherman Chang;J.-L. Huang;D.-M. Kwai;K.-T. Tim Cheng;C.-W. Wu; H.-M. Sherman Chang; J.-L. Huang; D.-M. Kwai; K.-T. Tim Cheng; C.-W. Wu; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T07:43:04Z A Low Communication Overhead and Load Balanced Parallel ATPG with Improved Static Fault Partition Method K.-W. Yeh;M.-F. Wu;J.-L. Huang; K.-W. Yeh; M.-F. Wu; J.-L. Huang; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T07:43:04Z A Self-Testing Assisted Pipelined-ADC Calibration Technique J.-L. Huang;X.-L. Huang;P.-Y. Kang; J.-L. Huang; X.-L. Huang; P.-Y. Kang; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T07:43:04Z An On-Chip Integrator Leakage Characterization Technique and Its Applications to Switched Capacitor Circuits Testing C.-Y. Yang;X.-L. Huang;J.-L. Huang; C.-Y. Yang; X.-L. Huang; J.-L. Huang; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T07:43:03Z A DfT Technique for Diagnosing Integrator Leakage of Single-Bit First-Order Delta-Sigma Modulator Using DC Input X.-L. Huang;C.-Y. Yang;J.-L. Huang; X.-L. Huang; C.-Y. Yang; J.-L. Huang; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T07:43:03Z Power Supply Noise Reduction for At-Speed Scan Testing in Linear-Decompression Environment M.-F. Wu;J.-L. Huang;X. Wen;K. Miyase; M.-F. Wu; J.-L. Huang; X. Wen; K. Miyase; JIUN-LANG HUANG

Showing items 11-35 of 72  (3 Page(s) Totally)
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