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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
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Repositories
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2019臺灣學術機構典藏
研討會
機構典藏系統RC7版本已
發佈

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Institution Date Title Author
國立中山大學 2005-8 Low-power bus driver design based on a charge recycle technique C.C. Wang;J.M. Huang;Y.M. Tseng
國立中山大學 2005-4 A low-jitter 80 MHz PLL for DVB-T receivers C.C. Wang;J.M. Huang;L.P. Lin
國立中山大學 2005-11 A 9-bit 20-MSample/s pipeline ADC for NTSC video decoders C.C. Wang;J.M. Huang;T.K. Cheng
國立中山大學 2005-11 Low-Power 5-bit 2.4 MS/s successive approximation ADC for ZigBee Receiver using 868/915 MHz Band C.C. Wang;J.M. Huang;K.T. Cheng
國立中山大學 2005-08 Switched-current 3-bit CMOS 4.0 MHz wideband random signal generator C.C. Wang;J.M. Huang;H.C. Cheng;R. Hu
國立中山大學 2005-02 A 2K/8K mode small-area FFT processor for OFDM demodulation of DVB-T receivers C.C. Wang;J.M. Huang;H.C. Cheng
國立中山大學 2005-01 2K/8K mode small-area FFT processor for OFDM demodulation of DVB-T receivers C.C. Wang;J.M. Huang;H.C. Cheng
國立中山大學 2005 Switched-current 3-bit CMOS 4.0 MHz wideband random signal generator C.C. Wang;J.M. Huang;H.C. Cheng;R. Hu
國立中山大學 2005 A 2K/8K mode small-area FFT processor for OFDM demodulation of DVB-T receivers C.C. Wang;J.M. Huang;H.C. Cheng
國立中山大學 2004-08 1.0 Gbps LVDS transceiver design for LCD panels C.C. Wang;J.M. Huang;J.F. Huang
國立中山大學 2004-08 A 2K/8K Dual-Mode FFT Processor for OFDM of DVB-T Receivers C.C. Wang;J.M. Huang;H.C. Cheng
國立中山大學 2004-08 1.0 Gbps LVDS transceiver design using a common mode DC biasing C.C. Wang;J.M. Huang

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