|
English
|
正體中文
|
简体中文
|
總筆數 :0
|
|
造訪人次 :
51939115
線上人數 :
904
教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
|
|
|
"jeffrey j p tsai"的相關文件
顯示項目 276-300 / 384 (共16頁)
<< < 7 8 9 10 11 12 13 14 15 16 > >>
每頁顯示[10|25|50]項目
| 亞洲大學 |
1998-04 |
Multimedia Software Engineering
|
蔡進發;Jeffrey, J.P.Tsai |
| 亞洲大學 |
1998-01 |
A Logic-Based Transformation Systems
|
Jeffrey J. P. Tsai;B. Li;T. Weigert |
| 亞洲大學 |
1998 |
Compositional Verification of Concurrent Systems Using Petri-Nets-Based Condensation Rules
|
Jeffrey J. P. Tsai;E. Juan;T. Murata |
| 國立臺灣海洋大學 |
1998 |
Compositional verification of concurrent systems using Petri-net-based condensation rules
|
Eric Y. T. Juan; Jeffrey J. P. Tsai; Tadao Murata |
| 亞洲大學 |
1997.10 |
An Incremental Verification of Software Architecture
|
蔡進發;Jeffrey, J.P.Tsai |
| 亞洲大學 |
1997.08 |
Efficient Compositional State-Space Verification for Communicating Processes in Distributed Systems
|
蔡進發;Jeffrey, J.P.Tsai;E.Juan;E.Juan |
| 亞洲大學 |
1997.02 |
An Incremental Verification Approach for Software Architecture Specification of Real-Time Systems
|
蔡進發;Jeffrey, J.P.Tsai |
| 亞洲大學 |
1997-10 |
An Incremental Verification of Software Architecture
|
蔡進發;Jeffrey, J.P.Tsai |
| 亞洲大學 |
1997-09 |
Incremental Verification of Software Architectures
|
Jeffrey J. P. Tsai;A. Sistla, A. Sahay, R. Paul |
| 亞洲大學 |
1997-08 |
Efficient Compositional State-Space Verification for Communicating Processes in Distributed Systems
|
Jeffrey J. P. Tsai;E. Juan |
| 亞洲大學 |
1997-08 |
Efficient Compositional State-Space Verification for Communicating Processes in Distributed Systems
|
蔡進發;Jeffrey, J.P.Tsai |
| 亞洲大學 |
1997-02 |
Incremental Verification of Architecture Specification Language for Real-Time Systems
|
Jeffrey J. P. Tsai;A. P. Sistla and Avinash Sahay |
| 亞洲大學 |
1997-02 |
An Incremental Verification Approach for Software Architecture Specification of Real-Time Systems
|
蔡進發;Jeffrey, J.P.Tsai |
| 亞洲大學 |
1997-01 |
Parallel Evalutation Model for Software Architecture Specification
|
Jeffrey J. P. Tsai;B. Li ;E. Juan |
| 亞洲大學 |
1996.12 |
An Integrated Architecture for Distributed Real-Time Systems Analysis
|
S.Yang;S.Yang;蔡進發;Jeffrey, J.P.Tsai;A.Liu;A.Liu |
| 亞洲大學 |
1996.10 |
An Efficient Analysis Method for Large-Scale Concurrent Systems
|
E.Juan;E.Juan;蔡進發;Jeffrey, J.P.Tsai;T.Murata;T.Murata |
| 亞洲大學 |
1996.10 |
A Hybrid Execution Model for Logic-Based Requirements Specifications
|
蔡進發;Jeffrey, J.P.Tsai;B.Li;B.Li |
| 亞洲大學 |
1996.08 |
Verifying Timing Properties of Distributed Real-Time Systems Using Timing Constraints Petri Nets
|
蔡進發;Jeffrey, J.P.Tsai;S.Yang;S.Yang;P.Chang;P.Chang;E.Juan;E.Juan |
| 亞洲大學 |
1996.06 |
Automatic Generation of Verification Scenario from Systems Requirements Specification
|
蔡進發;Jeffrey, J.P.Tsai |
| 亞洲大學 |
1996.02 |
A Logic-Based Requirements Language for the Specification and Analysis of Real-Time Systems
|
蔡進發;Jeffrey, J.P.Tsai;T.Weigert;T.Weigert |
| 亞洲大學 |
1996-12 |
An Integrated Architecture for Distributed Real-Time Systems Analysis
|
蔡進發;Jeffrey, J.P.Tsai |
| 亞洲大學 |
1996-10 |
A New Compositional Method for Condensed State Space Verification
|
Jeffrey J. P. Tsai;E. Juan and T. Murata |
| 亞洲大學 |
1996-10 |
A Hybrid Execution Model for Logic-Based Requirements Specifications
|
Jeffrey J. P. Tsai;B. Li and E. Juan |
| 亞洲大學 |
1996-10 |
A Hybrid Execution Model for Logic-Based Requirements Specifications
|
蔡進發;Jeffrey, J.P.Tsai |
| 亞洲大學 |
1996-10 |
An Efficient Analysis Method for Large-Scale Concurrent Systems
|
蔡進發;Jeffrey, J.P.Tsai |
顯示項目 276-300 / 384 (共16頁)
<< < 7 8 9 10 11 12 13 14 15 16 > >>
每頁顯示[10|25|50]項目
|
