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Showing items 36-60 of 106  (5 Page(s) Totally)
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Institution Date Title Author
國立交通大學 2014-12-08T15:27:38Z The IC design of a high speed RSA processor Yang, CC; Jen, CW; Chang, TS
國立交通大學 2014-12-08T15:27:37Z The IDCT processor on the Adder-Based distributed arithmetic Chen, CS; Chang, TS; Jen, CW
國立交通大學 2014-12-08T15:27:33Z A programmable concurrent video signal processor Chen, CC; Jen, CW
國立交通大學 2014-12-08T15:27:27Z An area and time efficient adder for multiple additions with different word-length Liang, BS; Nieh, YC; Jen, CW
國立交通大學 2014-12-08T15:27:23Z A novel recursive digital filter based on signed digit distributed arithmetic Su, CL; Hwang, YT; Jen, CW
國立交通大學 2014-12-08T15:27:17Z Hardware efficient transform designs with cyclic formulation and subexpression sharing Chang, TS; Jen, CW
國立交通大學 2014-12-08T15:27:14Z Low power FIR filter realization with differential coefficients and input Chang, TS; Jen, CW
國立交通大學 2014-12-08T15:27:14Z An architecture of full-search block matching for minimum memory bandwidth requirement Tuan, JC; Jen, CW
國立交通大學 2014-12-08T15:27:06Z Data stream generation for concurrent computation in VLSI signal processors Lin, TJ; Jen, CW
國立交通大學 2014-12-08T15:27:04Z A new hardware design and FPGA implementation for Internet routing towards IP over WDM and terabit routers Hsiao, IYL; Jen, CW
國立交通大學 2014-12-08T15:27:04Z Motion estimation using on-line arithmetic Su, CL; Jen, CW
國立交通大學 2014-12-08T15:27:03Z A high performance carry-save to signed-digit recoder for fused addition-multiplication Yeh, WC; Jen, CW
國立交通大學 2014-12-08T15:27:03Z On the study of logarithmic time parallel adders Yeh, WC; Jen, CW
國立交通大學 2014-12-08T15:26:37Z Cascade-configurable and scalable DSP environment Lin, TJ; Jen, CW
國立交通大學 2014-12-08T15:26:36Z Design and implementation of a scalable fast Fourier transform core Sung, CH; Lee, KB; Jen, CW
國立交通大學 2014-12-08T15:26:30Z High-speed memory-saving architecture for the embedded block coding in JPEG2000 Hsiao, YT; Lin, HD; Lee, KB; Jen, CW
國立交通大學 2014-12-08T15:26:22Z An efficient VLIW DSP architecture for baseband processing Lin, TJ; Chang, CC; Lee, CC; Jen, CW
國立交通大學 2014-12-08T15:26:19Z Performance evaluation of ring-structure register file in multimedia applications Lin, TJ; Chang, CC; Yang, TH; Chang, YM; Lin, CH; Lee, CC; Lin, HY; Jen, CW
國立交通大學 2014-12-08T15:26:19Z Coefficient optimization for area-effective multiplier-less FIR filters Lin, TJ; Yang, TH; Jen, CW
國立交通大學 2014-12-08T15:26:16Z Area-effective FIR filter design for multiplier-less implementation Lin, TJ; Yang, TH; Jen, CW
國立交通大學 2014-12-08T15:26:16Z Optimal data transfer and buffering schemes for JPEG 2000 encoder Chiu, MY; Lee, KB; Jen, CW
國立交通大學 2014-12-08T15:26:16Z Quality-aware memory controller for multimedia platform SOC Lin, TC; Lee, KB; Jen, CW
國立交通大學 2014-12-08T15:26:04Z A memory efficient realization of cyclic convolution and its application to discrete cosine transform Chen, HC; Guo, JI; Jen, CW
國立交通大學 2014-12-08T15:26:01Z Optimal frame memory and data transfer scheme for MPEG-4 shape coding Lee, KB; Chang, NYC; Chin, HY; Hsu, HJ; Jen, CW
國立交通大學 2014-12-08T15:25:57Z Trace-path analysis and performance estimation for multimedia application in embedded system Chang, NYC; Lee, KB; Jen, CW

Showing items 36-60 of 106  (5 Page(s) Totally)
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