English  |  正體中文  |  简体中文  |  Total items :0  
Visitors :  51921034    Online Users :  1072
Project Commissioned by the Ministry of Education
Project Executed by National Taiwan University Library
 
臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
About TAIR

Browse By

News

Copyright

Related Links

"jen cw"

Return to Browse by Author
Sorting by Title Sort by Date

Showing items 81-90 of 106  (11 Page(s) Totally)
<< < 2 3 4 5 6 7 8 9 10 11 > >>
View [10|25|50] records per page

Institution Date Title Author
國立交通大學 2014-12-08T15:05:56Z DESIGN OF A SYSTOLIC ARRAY SYSTEM FOR LINEAR STATE-EQUATIONS JOU, SJ; JEN, CW
國立交通大學 2014-12-08T15:05:45Z DESIGN OF ALGORITHM-BASED FAULT-TOLERANT VLSI ARRAY PROCESSOR LIU, CM; JEN, CW
國立交通大學 2014-12-08T15:05:43Z MULTI-DIMENSIONAL PARALLEL COMPUTING STRUCTURES FOR REGULAR ITERATIVE ALGORITHMS JEN, CW; KWAI, DM
國立交通大學 2014-12-08T15:05:35Z REDUNDANCY DESIGN FOR A FAULT TOLERANT SYSTOLIC ARRAY WANG, JJ; JEN, CW
國立交通大學 2014-12-08T15:05:33Z DESIGN OF ONE-DIMENSIONAL SYSTOLIC-ARRAY SYSTEMS FOR LINEAR STATE-EQUATIONS JEN, CW; JOU, SJ
國立交通大學 2014-12-08T15:05:01Z BIT-SLICED MEDIAN FILTER DESIGN BASED ON MAJORITY GATE LEE, CL; JEN, CW
國立交通大學 2014-12-08T15:05:00Z DATA FLOW REPRESENTATION OF ITERATIVE ALGORITHMS FOR SYSTOLIC ARRAYS JEN, CW; KWAI, DM
國立交通大學 2014-12-08T15:04:50Z ON THE DESIGN OF VLSI ARRAYS FOR DISCRETE FOURIER-TRANSFORM LIU, CM; JEN, CW
國立交通大學 2014-12-08T15:04:46Z THE EFFICIENT MEMORY-BASED VLSI ARRAY DESIGNS FOR DFT AND DCT GUO, JI; LIU, CM; JEN, CW
國立交通大學 2014-12-08T15:04:44Z A PARALLEL ADAPTIVE ALGORITHM FOR MOVING TARGET DETECTION AND ITS VLSI ARRAY REALIZATION LIU, CM; JEN, CW

Showing items 81-90 of 106  (11 Page(s) Totally)
<< < 2 3 4 5 6 7 8 9 10 11 > >>
View [10|25|50] records per page