| 國立交通大學 |
2014-12-08T15:35:06Z |
A multisymbol context-based arithmetic coding architecture for MPEG-4 shape coding
|
Lee, KB; Lin, JY; Jen, CW |
| 國立交通大學 |
2014-12-08T15:27:57Z |
A NOVEL MEMORY ARCHITECTURE FOR VIDEO SIGNAL PROCESSOR
|
HUNG, JS; LIN, CH; JEN, CW |
| 國立交通大學 |
2014-12-08T15:27:49Z |
A hardware-efficient architecture for 3-D graphics processor
|
Liang, BS; Nieh, YC; Niou, YP; Jen, CW; Chuang, G |
| 國立交通大學 |
2014-12-08T15:27:49Z |
HARDWARE SHARING IN TREE-STRUCTURE QMF BANKS
|
LEE, HR; JEN, CW |
| 國立交通大學 |
2014-12-08T15:27:49Z |
A RASTER ENGINE FOR COMPUTER GRAPHICS AND IMAGE COMPOSITION
|
CHEN, CL; LIN, CH; LEE, HR; JEN, CW |
| 國立交通大學 |
2014-12-08T15:27:38Z |
The IC design of a high speed RSA processor
|
Yang, CC; Jen, CW; Chang, TS |
| 國立交通大學 |
2014-12-08T15:27:37Z |
The IDCT processor on the Adder-Based distributed arithmetic
|
Chen, CS; Chang, TS; Jen, CW |
| 國立交通大學 |
2014-12-08T15:27:33Z |
A programmable concurrent video signal processor
|
Chen, CC; Jen, CW |
| 國立交通大學 |
2014-12-08T15:27:27Z |
An area and time efficient adder for multiple additions with different word-length
|
Liang, BS; Nieh, YC; Jen, CW |
| 國立交通大學 |
2014-12-08T15:27:23Z |
A novel recursive digital filter based on signed digit distributed arithmetic
|
Su, CL; Hwang, YT; Jen, CW |
| 國立交通大學 |
2014-12-08T15:27:17Z |
Hardware efficient transform designs with cyclic formulation and subexpression sharing
|
Chang, TS; Jen, CW |
| 國立交通大學 |
2014-12-08T15:27:14Z |
Low power FIR filter realization with differential coefficients and input
|
Chang, TS; Jen, CW |
| 國立交通大學 |
2014-12-08T15:27:14Z |
An architecture of full-search block matching for minimum memory bandwidth requirement
|
Tuan, JC; Jen, CW |
| 國立交通大學 |
2014-12-08T15:27:06Z |
Data stream generation for concurrent computation in VLSI signal processors
|
Lin, TJ; Jen, CW |
| 國立交通大學 |
2014-12-08T15:27:04Z |
A new hardware design and FPGA implementation for Internet routing towards IP over WDM and terabit routers
|
Hsiao, IYL; Jen, CW |
| 國立交通大學 |
2014-12-08T15:27:04Z |
Motion estimation using on-line arithmetic
|
Su, CL; Jen, CW |
| 國立交通大學 |
2014-12-08T15:27:03Z |
A high performance carry-save to signed-digit recoder for fused addition-multiplication
|
Yeh, WC; Jen, CW |
| 國立交通大學 |
2014-12-08T15:27:03Z |
On the study of logarithmic time parallel adders
|
Yeh, WC; Jen, CW |
| 國立交通大學 |
2014-12-08T15:26:37Z |
Cascade-configurable and scalable DSP environment
|
Lin, TJ; Jen, CW |
| 國立交通大學 |
2014-12-08T15:26:36Z |
Design and implementation of a scalable fast Fourier transform core
|
Sung, CH; Lee, KB; Jen, CW |
| 國立交通大學 |
2014-12-08T15:26:30Z |
High-speed memory-saving architecture for the embedded block coding in JPEG2000
|
Hsiao, YT; Lin, HD; Lee, KB; Jen, CW |
| 國立交通大學 |
2014-12-08T15:26:22Z |
An efficient VLIW DSP architecture for baseband processing
|
Lin, TJ; Chang, CC; Lee, CC; Jen, CW |
| 國立交通大學 |
2014-12-08T15:26:19Z |
Performance evaluation of ring-structure register file in multimedia applications
|
Lin, TJ; Chang, CC; Yang, TH; Chang, YM; Lin, CH; Lee, CC; Lin, HY; Jen, CW |
| 國立交通大學 |
2014-12-08T15:26:19Z |
Coefficient optimization for area-effective multiplier-less FIR filters
|
Lin, TJ; Yang, TH; Jen, CW |
| 國立交通大學 |
2014-12-08T15:26:16Z |
Area-effective FIR filter design for multiplier-less implementation
|
Lin, TJ; Yang, TH; Jen, CW |
| 國立交通大學 |
2014-12-08T15:26:16Z |
Optimal data transfer and buffering schemes for JPEG 2000 encoder
|
Chiu, MY; Lee, KB; Jen, CW |
| 國立交通大學 |
2014-12-08T15:26:16Z |
Quality-aware memory controller for multimedia platform SOC
|
Lin, TC; Lee, KB; Jen, CW |
| 國立交通大學 |
2014-12-08T15:26:04Z |
A memory efficient realization of cyclic convolution and its application to discrete cosine transform
|
Chen, HC; Guo, JI; Jen, CW |
| 國立交通大學 |
2014-12-08T15:26:01Z |
Optimal frame memory and data transfer scheme for MPEG-4 shape coding
|
Lee, KB; Chang, NYC; Chin, HY; Hsu, HJ; Jen, CW |
| 國立交通大學 |
2014-12-08T15:25:57Z |
Trace-path analysis and performance estimation for multimedia application in embedded system
|
Chang, NYC; Lee, KB; Jen, CW |
| 國立交通大學 |
2014-12-08T15:25:57Z |
QME: An efficient subsampling-based block matching algorithm for motion estimation
|
Lee, KB; Chin, HY; Hsu, HC; Jen, CW |
| 國立交通大學 |
2014-12-08T15:25:57Z |
A fast dual symbol context-based arithmetic coding for MPEG-4 shape coding
|
Lee, KB; Lin, JY; Jen, CW |
| 國立交通大學 |
2014-12-08T15:25:57Z |
A cost-effective MPEG-4 shape-adaptive DCT with auto-aligned transpose memory organization
|
Lee, KB; Hsu, HC; Jen, CW |
| 國立交通大學 |
2014-12-08T15:25:52Z |
Novel programmable digital signal processor for multimedia applications
|
Lin, LC; Lin, TJ; Lee, CC; Chao, CM; Chen, SK; Liu, CH; Hsiao, PC; Liu, CW; Jen, CW |
| 國立交通大學 |
2014-12-08T15:25:52Z |
Complexity-aware design of DA-based fir filters
|
Chen, CC; Lin, TJ; Liu, CW; Jen, CW |
| 國立交通大學 |
2014-12-08T15:25:40Z |
A bandwidth and memory efficient MPEG-4 shape encoder
|
Lee, KB; Chang, NYC; Chin, HY; Hsu, HC; Jen, CW |
| 國立交通大學 |
2014-12-08T15:25:38Z |
Lightweight arithmetic units for VLSI digital signal processors
|
Ou, SH; Lin, TJ; Lin, HY; Chao, CM; Liu, CW; Jen, CW |
| 國立交通大學 |
2014-12-08T15:25:38Z |
A novel register organization for VLIW digital signal processors
|
Lin, TJ; Lee, CC; Liu, CW; Jen, CW |
| 國立交通大學 |
2014-12-08T15:25:37Z |
Architecture for area-efficient 2-D transform in H.264/AVC
|
Kuo, YT; Lin, TY; Liu, CW; Jen, CW |
| 國立交通大學 |
2014-12-08T15:25:24Z |
Hierarchical instruction encoding for VLIW digital signal processors
|
Liu, CH; Lin, TJ; Chao, CM; Hsiao, PC; Lin, LC; Chen, SK; Huang, CW; Liu, CW; Jen, CW |
| 國立交通大學 |
2014-12-08T15:25:23Z |
Pipelining technique for energy-aware datapaths
|
Huang, WS; Lin, TJ; Ou, SH; Liu, CW; Jen, CW |
| 國立交通大學 |
2014-12-08T15:19:40Z |
A memory-efficient realization of cyclic convolution and its application to discrete cosine transform
|
Chen, HC; Guo, JI; Chang, TS; Jen, CW |
| 國立交通大學 |
2014-12-08T15:19:15Z |
An efficient quality-aware memory controller for multimedia platform SoC
|
Lee, KB; Lin, TC; Jen, CW |
| 國立交通大學 |
2014-12-08T15:19:15Z |
The long length DHT design with a new hardware efficient distributed arithmetic approach and cyclic preserving partitioning
|
Chen, HC; Chang, TS; Guo, JI; Jen, CW |
| 國立交通大學 |
2014-12-08T15:18:00Z |
Distributed arithmetic realisation of cyclic convolution and its DFT application
|
Chen, HC; Guo, JI; Jen, CW; Chang, TS |
| 國立交通大學 |
2014-12-08T15:17:31Z |
A compact DSP core with static floating-point arithmetic
|
Lin, TJ; Lin, HY; Chao, CM; Liu, CW; Jen, CW |
| 國立交通大學 |
2014-12-08T15:06:26Z |
DEPLETION WIDTHS OF THE METAL-INSULATOR SEMICONDUCTOR (MIS) STRUCTURE
|
JEN, CW; LEE, CL; LEI, TF |
| 國立交通大學 |
2014-12-08T15:06:09Z |
MOTA - A MOSFET TIMING SIMULATOR
|
JOU, SJ; JEN, CW; SHEN, WZ; LEE, CL |
| 國立交通大學 |
2014-12-08T15:06:03Z |
ELLIPSOMETRY MEASUREMENTS ON SIO2-FILMS FOR THICKNESSES UNDER 200-A
|
HO, JH; LEE, CL; JEN, CW; LEI, TF |
| 國立交通大學 |
2014-12-08T15:06:02Z |
SIMULATABLE TIMING MODEL FOR MOS LOGIC-CIRCUIT
|
JOU, SJ; SHEN, WZ; JEN, CW; LEE, CL |
