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"jen y n"
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| 臺大學術典藏 |
2020-06-11T06:31:42Z |
A 20 to 24 GHz + 16.8 dBm fully integrated power amplifier using 0.18 μm CMOS process
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Jen, Y.-N.;Tsai, J.-H.;Peng, C.-T.;Huang, T.-W.; Jen, Y.-N.; Tsai, J.-H.; Peng, C.-T.; Huang, T.-W.; TIAN-WEI HUANG |
| 臺大學術典藏 |
2020-06-04T07:53:46Z |
A 0.7-V 60-GHz low-power LNA with forward body bias technique in 90 nm CMOS process
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Lin, W.-H.;Tsai, J.-H.;Jen, Y.-N.;Huang, T.-W.;Wang, H.; Lin, W.-H.; Tsai, J.-H.; Jen, Y.-N.; Huang, T.-W.; Wang, H.; HUEI WANG |
| 臺大學術典藏 |
2018-09-10T08:09:34Z |
V-band fully-integrated CMOS LNA and DAT PA for 60 GHz WPAN applications
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Lin, W.-H.;Jen, Y.-N.;Tsai, J.-H.;Lu, H.-C.;Huang, T.-W.; Lin, W.-H.; Jen, Y.-N.; Tsai, J.-H.; Lu, H.-C.; Huang, T.-W.; HSIN-CHIA LU |
| 臺大學術典藏 |
2018-09-10T08:09:34Z |
V-band fully-integrated CMOS LNA and DAT PA for 60 GHz WPAN applications
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Lin, W.-H.;Jen, Y.-N.;Tsai, J.-H.;Lu, H.-C.;Huang, T.-W.; Lin, W.-H.; Jen, Y.-N.; Tsai, J.-H.; Lu, H.-C.; Huang, T.-W.; HSIN-CHIA LU |
Showing items 1-4 of 4 (1 Page(s) Totally)
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