| 臺大學術典藏 |
2020-06-11T06:11:15Z |
Encoding multi-valued functions for symmetry.
|
Yuan, Ko-Lung;Kuo, Chien-Yen;Jiang, Jie-Hong R.;Li, Meng-Yen; Yuan, Ko-Lung; Kuo, Chien-Yen; Jiang, Jie-Hong R.; Li, Meng-Yen; JIE-HONG JIANG |
| 臺大學術典藏 |
2020-06-11T06:11:15Z |
Synthesis of Nondeterministic Behavior in Recombinase-Based Genetic Circuits.
|
Lin, Zi-Jun;Huang, Wei-Chih;Jiang, Jie-Hong Roland; Lin, Zi-Jun; Huang, Wei-Chih; Jiang, Jie-Hong Roland; JIE-HONG JIANG |
| 臺大學術典藏 |
2020-06-11T06:11:14Z |
Recombinase-based genetic circuit optimization
|
Lai, C.-N.;Jiang, J.-H.R.;Fages, F.; Lai, C.-N.; Jiang, J.-H.R.; Fages, F.; JIE-HONG JIANG |
| 臺大學術典藏 |
2020-06-11T06:11:13Z |
Effective FPGA Resource Utilization for Quasi Delay Insensitive Implementation of Asynchronous Circuits.
|
Chang, Yi-Fan Evan;Huang, Ruei-Yang;Jiang, Jie-Hong R.; Chang, Yi-Fan Evan; Huang, Ruei-Yang; Jiang, Jie-Hong R.; JIE-HONG JIANG |
| 臺大學術典藏 |
2020-06-11T06:11:12Z |
A Cube Distribution Approach to QBF Solving and Certificate Minimization.
|
Chen, Li-Cheng;Jiang, Jie-Hong R.; Chen, Li-Cheng; Jiang, Jie-Hong R.; JIE-HONG JIANG |
| 臺大學術典藏 |
2020-06-11T06:11:12Z |
Bi-decomposition using SAT and interpolation
|
Lee, R.-R.;Jiang, J.-H.R.;Hung, W.-L.; Lee, R.-R.; Jiang, J.-H.R.; Hung, W.-L.; JIE-HONG JIANG |
| 臺大學術典藏 |
2020-06-11T06:11:12Z |
Logic Synthesis in a Nutshell
|
Jiang, J.H.;Devadas, S.; Jiang, J.H.; Devadas, S.; JIE-HONG JIANG |
| 臺大學術典藏 |
2020-06-11T06:11:11Z |
Extracting functions from boolean relations using SAT and interpolation
|
Jiang, J.-H.R.;Lin, H.-P.;Hung, W.-L.; Jiang, J.-H.R.; Lin, H.-P.; Hung, W.-L.; JIE-HONG JIANG |
| 臺大學術典藏 |
2020-06-11T06:11:11Z |
Hardware Equivalence and Property Verification.
|
Jiang, Jie-Hong Roland;Villa, Tiziano;Crama, Yves;Hammer, Peter L.; Jiang, Jie-Hong Roland; Villa, Tiziano; Crama, Yves; Hammer, Peter L.; JIE-HONG JIANG |
| 臺大學術典藏 |
2020-06-11T06:11:11Z |
Clauses Versus Gates in CEGAR-Based 2QBF Solving.
|
Balabanov, Valeriy;Jiang, Jie-Hong Roland;Mishchenko, Alan;Scholl, Christoph; Balabanov, Valeriy; Jiang, Jie-Hong Roland; Mishchenko, Alan; Scholl, Christoph; JIE-HONG JIANG |
| 臺大學術典藏 |
2019-10-24T07:45:24Z |
An approximation algorithm to the optimal switch control of reconfigurable battery packs
|
江介宏;JIE-HONG JIANG;Mao-Cheng Huang;Shih-Hao Liang;Shou-Hung Welkin Ling;Jie-Hong R. Jiang;Shih-Yu Chen; Shih-Yu Chen; Jie-Hong R. Jiang; Shou-Hung Welkin Ling; Shih-Hao Liang; Mao-Cheng Huang; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:24Z |
An approximation algorithm to the optimal switch control of reconfigurable battery packs
|
江介宏;JIE-HONG JIANG;Mao-Cheng Huang;Shih-Hao Liang;Shou-Hung Welkin Ling;Jie-Hong R. Jiang;Shih-Yu Chen; Shih-Yu Chen; Jie-Hong R. Jiang; Shou-Hung Welkin Ling; Shih-Hao Liang; Mao-Cheng Huang; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:24Z |
A PSPACE Subclass of Dependency Quantified Boolean Formulas and Its Effective Solving
|
江介宏;JIE-HONG JIANG;Aile Ge-Ernst;Ralf Wimmer;Jie-Hong R. Jiang;Christoph Scholl; Christoph Scholl; Jie-Hong R. Jiang; Ralf Wimmer; Aile Ge-Ernst; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:24Z |
A PSPACE Subclass of Dependency Quantified Boolean Formulas and Its Effective Solving
|
江介宏;JIE-HONG JIANG;Aile Ge-Ernst;Ralf Wimmer;Jie-Hong R. Jiang;Christoph Scholl; Christoph Scholl; Jie-Hong R. Jiang; Ralf Wimmer; Aile Ge-Ernst; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:23Z |
Static Detection of API Call Vulnerabilities in iOS Executables
|
江介宏;JIE-HONG JIANG;T. Bultan;J.-H. R. Jiang;F. Yu;C.-H. Lin; C.-H. Lin; F. Yu; J.-H. R. Jiang; T. Bultan; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:23Z |
Static Detection of API Call Vulnerabilities in iOS Executables
|
江介宏;JIE-HONG JIANG;T. Bultan;J.-H. R. Jiang;F. Yu;C.-H. Lin; C.-H. Lin; F. Yu; J.-H. R. Jiang; T. Bultan; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:23Z |
Canonicalization of Threshold Logic Representation and its Applications
|
江介宏;JIE-HONG JIANG;J.-H. R. Jiang;N.-Z. Lee;S.-Y. Lee; S.-Y. Lee; N.-Z. Lee; J.-H. R. Jiang; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:23Z |
Canonicalization of Threshold Logic Representation and its Applications
|
江介宏;JIE-HONG JIANG;J.-H. R. Jiang;N.-Z. Lee;S.-Y. Lee; S.-Y. Lee; N.-Z. Lee; J.-H. R. Jiang; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:23Z |
Logic Synthesis of Binarized Neural Networks for Efficient Circuit Implementation
|
江介宏;JIE-HONG JIANG;J.-H. R. Jiang;C.-C. Chi; C.-C. Chi; J.-H. R. Jiang; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:23Z |
Logic Synthesis of Binarized Neural Networks for Efficient Circuit Implementation
|
江介宏;JIE-HONG JIANG;J.-H. R. Jiang;C.-C. Chi; C.-C. Chi; J.-H. R. Jiang; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:23Z |
Cost-Aware Patch Generation for Multi-Target Function Rectification of Engineering Change Orders
|
江介宏;JIE-HONG JIANG;J.-H. R. Jiang;H.-T. Zhang; H.-T. Zhang; J.-H. R. Jiang; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:23Z |
Cost-Aware Patch Generation for Multi-Target Function Rectification of Engineering Change Orders
|
江介宏;JIE-HONG JIANG;J.-H. R. Jiang;H.-T. Zhang; H.-T. Zhang; J.-H. R. Jiang; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:23Z |
Efficient Multi-Layer Obstacle-Avoiding Region-to-Region Rectilinear Steiner Tree Construction
|
江介宏;JIE-HONG JIANG;J.-H. R. Jiang;C.-M. Li;Y.-W. Chang;Y.-C. Pai;H.-T. Wen;J.-J. Wang;C.-C. Pai;R.-Y. Wang; R.-Y. Wang; C.-C. Pai; J.-J. Wang; H.-T. Wen; Y.-C. Pai; Y.-W. Chang; C.-M. Li; J.-H. R. Jiang; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:23Z |
Efficient Multi-Layer Obstacle-Avoiding Region-to-Region Rectilinear Steiner Tree Construction
|
江介宏;JIE-HONG JIANG;J.-H. R. Jiang;C.-M. Li;Y.-W. Chang;Y.-C. Pai;H.-T. Wen;J.-J. Wang;C.-C. Pai;R.-Y. Wang; R.-Y. Wang; C.-C. Pai; J.-J. Wang; H.-T. Wen; Y.-C. Pai; Y.-W. Chang; C.-M. Li; J.-H. R. Jiang; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:22Z |
Homing Sequence Derivation with Quantified Boolean Satisfiability
|
Jie-Hong R. Jiang; Natalia Kushik; JIE-HONG JIANG; 江介宏; Kuan-Hua Tu; Hung-En Wang; 江介宏;JIE-HONG JIANG;Natalia Kushik;Jie-Hong R. Jiang;Kuan-Hua Tu;Hung-En Wang |
| 臺大學術典藏 |
2019-10-24T07:45:22Z |
Homing Sequence Derivation with Quantified Boolean Satisfiability
|
Jie-Hong R. Jiang; Natalia Kushik; JIE-HONG JIANG; 江介宏; Kuan-Hua Tu; Hung-En Wang; 江介宏;JIE-HONG JIANG;Natalia Kushik;Jie-Hong R. Jiang;Kuan-Hua Tu;Hung-En Wang |
| 臺大學術典藏 |
2019-10-24T07:45:22Z |
RecombinaseBased Genetic Circuit Optimization
|
江介宏;JIE-HONG JIANG;Francois Fages;Jie-Hong Jiang;Chun-Ning Lai; Chun-Ning Lai; Jie-Hong Jiang; Francois Fages; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:22Z |
RecombinaseBased Genetic Circuit Optimization
|
江介宏;JIE-HONG JIANG;Francois Fages;Jie-Hong Jiang;Chun-Ning Lai; Chun-Ning Lai; Jie-Hong Jiang; Francois Fages; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:22Z |
RecombinaseBased Genetic Circuit Optimization
|
江介宏;JIE-HONG JIANG;Francois Fages;Jie-Hong Jiang;Chun-Ning Lai; Chun-Ning Lai; Jie-Hong Jiang; Francois Fages; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:22Z |
RecombinaseBased Genetic Circuit Optimization
|
江介宏;JIE-HONG JIANG;Francois Fages;Jie-Hong Jiang;Chun-Ning Lai; Chun-Ning Lai; Jie-Hong Jiang; Francois Fages; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:22Z |
Sequential Engineering Change Order under Retiming and Resynthesis
|
江介宏;JIE-HONG JIANG;Jie-Hong R. Jiang;Victor Kravets;Nian-Ze Lee; Nian-Ze Lee; Victor Kravets; Jie-Hong R. Jiang; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:22Z |
Sequential Engineering Change Order under Retiming and Resynthesis
|
江介宏;JIE-HONG JIANG;Jie-Hong R. Jiang;Victor Kravets;Nian-Ze Lee; Nian-Ze Lee; Victor Kravets; Jie-Hong R. Jiang; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:22Z |
A Symbolic Model Checking Approach to the Analysis of String and Length Constraints
|
江介宏;JIE-HONG JIANG;J.-H. R. Jiang;F. Yu;S.-Y. Chen;H.-E. Wang; H.-E. Wang; S.-Y. Chen; F. Yu; J.-H. R. Jiang; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:22Z |
A Symbolic Model Checking Approach to the Analysis of String and Length Constraints
|
江介宏;JIE-HONG JIANG;J.-H. R. Jiang;F. Yu;S.-Y. Chen;H.-E. Wang; H.-E. Wang; S.-Y. Chen; F. Yu; J.-H. R. Jiang; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:22Z |
Solving Exist-Random Quantified Stochastic Boolean Satisfiability via Clause Selection
|
江介宏;JIE-HONG JIANG;J.-H. R. Jiang;Y.-S. Wang;N.-Z. Lee; N.-Z. Lee; Y.-S. Wang; J.-H. R. Jiang; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:22Z |
Solving Exist-Random Quantified Stochastic Boolean Satisfiability via Clause Selection
|
江介宏;JIE-HONG JIANG;J.-H. R. Jiang;Y.-S. Wang;N.-Z. Lee; N.-Z. Lee; Y.-S. Wang; J.-H. R. Jiang; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:21Z |
Analytic approaches to the collapse operation and equivalence verification of threshold logic circuits
|
江介宏;JIE-HONG JIANG;Jie-Hong R. Jiang;Yi-Hsiang Lai;Hao-Yuan Kuo;Nian-Ze Lee; Nian-Ze Lee; Hao-Yuan Kuo; Yi-Hsiang Lai; Jie-Hong R. Jiang; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:21Z |
Analytic approaches to the collapse operation and equivalence verification of threshold logic circuits
|
江介宏;JIE-HONG JIANG;Jie-Hong R. Jiang;Yi-Hsiang Lai;Hao-Yuan Kuo;Nian-Ze Lee; Nian-Ze Lee; Hao-Yuan Kuo; Yi-Hsiang Lai; Jie-Hong R. Jiang; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:21Z |
Criticality and Sensitivity Analysis for Incremental Performance Optimization of Asynchronous Pipelines
|
江介宏;JIE-HONG JIANG;Jie-Hong Roland Jiang;Chun-Hong Shih; Chun-Hong Shih; Jie-Hong Roland Jiang; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:21Z |
Criticality and Sensitivity Analysis for Incremental Performance Optimization of Asynchronous Pipelines
|
江介宏;JIE-HONG JIANG;Jie-Hong Roland Jiang;Chun-Hong Shih; Chun-Hong Shih; Jie-Hong Roland Jiang; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:21Z |
Path-Specific Functional Timing Verification under Floating and Transition Modes of Operation
|
Jie-Hong R. Jiang; JIE-HONG JIANG; 江介宏; 江介宏;JIE-HONG JIANG;Jie-Hong R. Jiang;Chun-Ning Lai; Chun-Ning Lai |
| 臺大學術典藏 |
2019-10-24T07:45:21Z |
Path-Specific Functional Timing Verification under Floating and Transition Modes of Operation
|
Jie-Hong R. Jiang; JIE-HONG JIANG; 江介宏; 江介宏;JIE-HONG JIANG;Jie-Hong R. Jiang;Chun-Ning Lai; Chun-Ning Lai |
| 臺大學術典藏 |
2019-10-24T07:45:21Z |
Closing the Accuracy Gap of Static Performance Analysis of Asynchronous Circuits
|
江介宏;JIE-HONG JIANG;Jie-Hong R. Jiang;Chun-Hong Shih;Cheng-Yu Shih; Cheng-Yu Shih; Chun-Hong Shih; Jie-Hong R. Jiang; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:21Z |
Closing the Accuracy Gap of Static Performance Analysis of Asynchronous Circuits
|
江介宏;JIE-HONG JIANG;Jie-Hong R. Jiang;Chun-Hong Shih;Cheng-Yu Shih; Cheng-Yu Shih; Chun-Hong Shih; Jie-Hong R. Jiang; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:21Z |
Solving Stochastic Boolean Satisfiability under Random-Exist Quantification
|
江介宏;JIE-HONG JIANG;Jie-Hong R. Jiang;Yen-Shi Wang;Nian-Ze Lee; Nian-Ze Lee; Yen-Shi Wang; Jie-Hong R. Jiang; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:21Z |
Solving Stochastic Boolean Satisfiability under Random-Exist Quantification
|
江介宏;JIE-HONG JIANG;Jie-Hong R. Jiang;Yen-Shi Wang;Nian-Ze Lee; Nian-Ze Lee; Yen-Shi Wang; Jie-Hong R. Jiang; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:20Z |
A Gridless Approach to the Satisfiability of Self-Aligned Triple Patterning
|
江介宏;JIE-HONG JIANG;Jie-Hong R. Jiang;Mei-Yen Chiu;Hsiao-Lei Chien; Hsiao-Lei Chien; Mei-Yen Chiu; Jie-Hong R. Jiang; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:20Z |
A Gridless Approach to the Satisfiability of Self-Aligned Triple Patterning
|
江介宏;JIE-HONG JIANG;Jie-Hong R. Jiang;Mei-Yen Chiu;Hsiao-Lei Chien; Hsiao-Lei Chien; Mei-Yen Chiu; Jie-Hong R. Jiang; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:20Z |
Towards Formal Evaluation and Verification of Probabilistic Design
|
江介宏;JIE-HONG JIANG;Jie-Hong R. Jiang;Nian-Ze Lee; Nian-Ze Lee; Jie-Hong R. Jiang; JIE-HONG JIANG; 江介宏 |
| 臺大學術典藏 |
2019-10-24T07:45:20Z |
Towards Formal Evaluation and Verification of Probabilistic Design
|
江介宏;JIE-HONG JIANG;Jie-Hong R. Jiang;Nian-Ze Lee; Nian-Ze Lee; Jie-Hong R. Jiang; JIE-HONG JIANG; 江介宏 |
