臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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	2019臺灣學術機構典藏研討會
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Institution	Date	Title	Author
南台科技大學	2004-06	Characteristics of Spike-Free Single and Double Heterostructure-Emitter Bipolar Transistors	Yu-Shyan Lin; Wei-Chou Hsu; Fuh-Cheng Jong; Yu-Zung Chiou; Yeong-Jia Chen; Jing-Jou Tang;蔣富成;唐經洲;邱裕中
南台科技大學	2004-06	Characteristics of Spike-Free Single and Double Heterostructure-Emitter Bipolar Transistors	Yu-Shyan Lin; Wei-Chou Hsu; Fuh-Cheng Jong; Yu-Zung Chiou; Yeong-Jia Chen; Jing-Jou Tang;蔣富成;唐經洲;邱裕中
南台科技大學	2004-03	GaN Photodetectors with Transparent Indium Tin Oxide Electrodes	Yu-Zung Chiou; Jing-Jou Tang
南台科技大學	2004	GaN MSM photodetectors with TiW transparent electrodes	C. K. Wang; S. J. Chang; Y. K. Su;C. S. Chang; C. H. Kuo;T. K. Lin; T. K. Ko;唐經洲; Jing-Jou Tang; 邱裕中; Yu-Zung Chiou
南台科技大學	2004	GaN Photodetectors with Transparent Indium Tin Oxide Electrodes	唐經洲; Jing-Jou Tang;邱裕中; Yu-Zung Chiou
南台科技大學	2004	Characteristics of spike-free single and double heterostructure-emitter bipolar transistors	Yu-Shyan Lin; Wei-Chou Hsu; Fuh-Cheng Jong; Yu-Zung Chiou; Yeong-Jia Chen; Jing-Jou Tang;蔣富成;唐經洲;邱裕中
南台科技大學	2003-12	On the Use of Multiplier Area Reduction Technique in OFDM Implementations	Chao-Tang Yu; Shung-Chih Chen; Chia-Lian Tsai; Jing-Jou Tang
南台科技大學	2003-09	On the use of Multiplier Area Reduction Technique in OFDM Implementations	Chao-Tang Yu; Shung-Chih Chen; Chia-Lian Tsai; Jing-Jou Tang
南台科技大學	2002-08	Implementation of FFT Architecture in A Programmable OFDM	Shuenn-Yuh Lee; Sin-Hsien Wu; Chao-Tang Yu; Jing-Jou Tang
南台科技大學	2001	EM78447應用之GPS環境遙測系統	唐經洲; Jing-Jou Tang
南台科技大學	1999-04	BIFEST: A Built-in Intermediate Fault Effect Sensing and Test Generation System for CMOS Bridging Faults	Kuen-Jong Lee; 唐經洲; Jing-Jou Tang; Tsung-Chu Huang
南台科技大學	1999-01	Graph-based detail router for hierarchical filed-programmable gate arrays	P. C. Wang;唐經洲; Jing-Jou Tang
南台科技大學	1998-10	A new representation for programmable logic arrays to facilitate testing and logic design	J. J. Tang; K. J. Lee; B. D. Liu;唐經洲; Jing-Jou Tang
南台科技大學	1998	A Built-In Current Sensor Based on Current-Mode Design	李昆忠; Kuen-Jong Lee; 唐經洲; Jing-Jou Tang
南台科技大學	1996-09	Low test-application time method for EEPLA testing	B. D. Liu; K. C. Wei; J. J. Tang;唐經洲; Jing-Jou Tang
南台科技大學	1996-04	A Built-In Current Sensor Based on Current-Mode Design	李昆忠; Kuen-Jong Lee; 唐經洲; Jing-Jou Tang; 劉濱達
南台科技大學	1996-01	Combination of automatic test pattern generation and built-in intermediate voltage sensing for detecting CMOS bridging faults	Kuen-Jong Lee ; Jing-Jou Tang;Tsung-Chu Huang; Cheng-Liang Tsai; 李昆忠;唐經洲;黃宗柱
南台科技大學	1995-06	A practical current sensing technique for IDDQ testing	唐經洲; Jing-Jou Tang; Kuen-Jong Lee; Bin-Da Liu
南台科技大學	1995-03	Bulit-in intermediate voltage testing for CMOS circuits	Jing-Jou Tang ; Kuen-Jong Lee; Bin-Da Liu; 唐經洲;李昆忠;劉濱達

Showing items 41-59 of 59 (3 Page(s) Totally)
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