臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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Institution	Date	Title	Author
臺大學術典藏	2018-09-10T04:36:02Z	A Delay-Line Based On-Chip Jitter Measurement Technique	J. J. Huang; J. L. Huang; JIUN-LANG HUANG
臺大學術典藏	2018-09-10T04:36:02Z	A Low-Cost Jitter Measurement Technique for BIST Applications	J. J. Huang; J. L. Huang; JIUN-LANG HUANG
臺大學術典藏	2018-09-10T04:15:41Z	Testing Second-Order Delta-Sigma Modulators using Pseudo-Random Patterns	C. K. Ong; J. L. Huang; K. T. Cheng; JIUN-LANG HUANG
臺大學術典藏	2018-09-10T04:15:41Z	On-Chip Analog Response Extraction with 1-Bit Sigma-Delta Modulators	H. C. Hong; J. L. Huang; K. T. Cheng; C. W. Wu; JIUN-LANG HUANG
臺大學術典藏	2018-09-10T03:50:56Z	An on-chip short-time interval measurement technique for testing high-speed communication links	J.L. Huang; K.T. Cheng; JIUN-LANG HUANG
臺大學術典藏	2014-09	逐次逼近暫存器類比數位轉換器及其線性度校正的方法	JIUN-LANG HUANG; ��; ��T��; �L��w; �d��o; JIUN-LANG HUANG
臺大學術典藏	2014-09	逐次逼近暫存器類比數位轉換器及其線性度校正的方法	JIUN-LANG HUANG; ��; ��T��; �L��w; �d��o; JIUN-LANG HUANG
臺大學術典藏	2014-02	生成裝置、判別方法、生成方法及びプログラム	JIUN-LANG HUANG; �c�u�T��; �ž�C; \|��T��; �d�s�; JIUN-LANG HUANG
臺大學術典藏	2014-02	生成裝置、判別方法、生成方法及びプログラム	JIUN-LANG HUANG; �c�u�T��; �ž�C; \|��T��; �d�s�; JIUN-LANG HUANG
臺大學術典藏	2013-03	A Low-Cost Error Tolerance Scheme for 3-D CMOS Imagers	D.-M. Kwai; K.-T. Cheng; C.-W. Wu; JIUN-LANG HUANG; J.-L. Huang; H.-M. Chang; H.-M. Chang;J.-L. Huang;D.-M. Kwai;K.-T. Cheng;C.-W. Wu
臺大學術典藏	2007-01	Chap. 11 Software-Based Self-Testing	J.-L. Huang; K.-T. Cheng; JIUN-LANG HUANG

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