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"jiun lang huang"的相关文件
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| 臺大學術典藏 |
2022-09-21T23:31:01Z |
Automatic Test Program Generation for Transition Delay Faults in Pipelined Processors
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Chen, Kai Hsun; Yang, Bo Yi; Liang, Jia Ruei; Chen, Hung Lin; JIUN-LANG HUANG |
| 臺大學術典藏 |
2021-07-15T05:32:57Z |
Opportunities for 2.5/3D Heterogeneous SoC Integration
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HUI-RU JIANG; YAO-WEN CHANG; JIUN-LANG HUANG; CHUNG-PING CHEN |
| 臺大學術典藏 |
2020-06-11T06:50:43Z |
A Charge-Sensing-Capable Source Driver for TFT Array Testing in System-on-Panel Displays.
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Lin, Chen-Wei;Huang, Jiun-Lang; Lin, Chen-Wei; Huang, Jiun-Lang; JIUN-LANG HUANG |
| 臺大學術典藏 |
2020-06-11T06:50:42Z |
Structural and optical properties of InGaN/GaN multiple quantum well light emitting diodes grown on (1122) facet GaN/sapphire templates by metalorganic chemical vapor deposition
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Huang, J.-L.;Wang, L.S.;Lai, Y.-S.;Lee, Y.-C.;Qiu, Z.R.;Liu, S.;Wuu, D.-S.;Feng, Z.C.; Huang, J.-L.; Wang, L.S.; Lai, Y.-S.; Lee, Y.-C.; Qiu, Z.R.; Liu, S.; Wuu, D.-S.; Feng, Z.C.; JIUN-LANG HUANG |
| 臺大學術典藏 |
2020-06-11T06:50:42Z |
Time-resolved and temperature-varied photoluminescence studies of InGaN/GaN multiple quantum well structures
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Feng, Z.C.; JIUN-LANG HUANG; Huang, J.-J.; Liu, L.;Wang, W.;Huang, J.-L.;Hu, X.;Chen, P.;Huang, J.-J.;Feng, Z.C.; Liu, L.; Wang, W.; Huang, J.-L.; Hu, X.; Chen, P. |
| 臺大學術典藏 |
2020-06-11T06:50:41Z |
Guest Editors' Introduction: A Promising Alternative to Conventional Silicon
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Huang, Jiun-Lang;Cheng, Kwang-Ting; Huang, Jiun-Lang; Cheng, Kwang-Ting; JIUN-LANG HUANG |
| 臺大學術典藏 |
2020-06-11T06:50:41Z |
Using launch-on-capture for testing scan designs containing synchronous and asynchronous clock domains
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Wu, S.;Wang, L.-T.;Wen, X.;Jiang, Z.;Tan, L.;Zhang, Y.;Hu, Y.;Jone, W.-B.;Hsiao, M.S.;Li, J.C.-M.;Huang, J.-L.;Yu, L.; Wu, S.; Wang, L.-T.; Wen, X.; Jiang, Z.; Tan, L.; Zhang, Y.; Hu, Y.; Jone, W.-B.; Hsiao, M.S.; Li, J.C.-M.; Huang, J.-L.; Yu, L.; JIUN-LANG HUANG |
| 臺大學術典藏 |
2020-06-11T06:50:40Z |
A Multi-Fault Dynamic Compaction Technique for Test Pattern Count Reduction
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Li, B.-Y.;Huang, J.-L.; Li, B.-Y.; Huang, J.-L.; JIUN-LANG HUANG |
| 臺大學術典藏 |
2020-06-11T06:50:40Z |
An FPGA-Based Data Receiver for Digital IC Testing.
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Huang, Wei-Chen;Hou, Guan-Hao;Huang, Jiun-Lang;Kuo, Terry; Huang, Wei-Chen; Hou, Guan-Hao; Huang, Jiun-Lang; Kuo, Terry; JIUN-LANG HUANG |
| 臺大學術典藏 |
2020-06-11T06:50:39Z |
On pre/post-bond testing and calibrating SAR ADC array in 3-D CMOS imager
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Huang, X.-L.;Kang, P.-Y.;Huang, J.-L.;Chou, Y.-F.;Lee, Y.-P.;Kwai, D.-M.; Huang, X.-L.; Kang, P.-Y.; Huang, J.-L.; Chou, Y.-F.; Lee, Y.-P.; Kwai, D.-M.; JIUN-LANG HUANG |
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