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| 國立交通大學 |
2019-04-02T06:04:37Z |
A Formal Method to Improve SystemVerilog Functional Coverage
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Cheng, An-Che; Yen, Chia-Chih; Jou, Jing-Yang |
| 臺大學術典藏 |
2018-09-10T03:29:38Z |
Crosstalk-driven interconnect optimization by simultaneous gate and wire sizing
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Jiang, Iris Hui-Ru; Chang, Yao-Wen; Jou, Jing-Yang; YAO-WEN CHANG |
| 臺大學術典藏 |
2018-09-10T03:29:37Z |
Optimal reliable crosstalk-driven interconnect optimization
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Jiang, Iris Hui-Ru; Pan, Song-Ra; Chang, Yao-Wen; Jou, Jing-Yang; YAO-WEN CHANG |
| 國立交通大學 |
2018-08-21T05:56:36Z |
Cache Capacity Aware Thread Scheduling for Irregular Memory Access on Many-Core GPGPUs
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Kuo, Hsien-Kai; Yen, Ta-Kan; Lai, Bo-Cheng Charles; Jou, Jing-Yang |
| 國立交通大學 |
2017-04-21T06:50:12Z |
A Learning-on-Cloud Power Management Policy for Smart Devices
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Pan, Gung-Yu; Lai, Bo-Cheng Charles; Chen, Sheng-Yen; Jou, Jing-Yang |
| 國立交通大學 |
2017-04-21T06:50:05Z |
Accelerating Dynamic Peak Power Analysis Using An Essential-Signal-Based Methodology
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Shih, Che-Hua; Yen, Chia-Chih; Lin, Shen-Tien; Lin, Hermes; Jou, Jing-Yang |
| 國立交通大學 |
2017-04-21T06:49:52Z |
Chain-Based Pin Count Minimization for General-Purpose Digital Microfluidic Biochips
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Lei, Yung-Chun; Hsu, Chen-Shing; Huang, Juinn-Dar; Jou, Jing-Yang |
| 國立交通大學 |
2017-04-21T06:49:29Z |
Resource-Aware Functional ECO Patch Generation
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Cheng, An-Che; Jiang, Iris Hui-Ru; Jou, Jing-Yang |
| 國立交通大學 |
2016-03-28T00:04:19Z |
Scalable Global Power Management Policy Based on Combinatorial Optimization for Multiprocessors
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Pan, Gung-Yu; Yang, Jed; Jou, Jing-Yang; Lai, Bo-Cheng Charles |
| 國立交通大學 |
2015-12-02T02:59:21Z |
Power-Efficient Instancy Aware DRAM Scheduling
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Pan, Gung-Yu; Lai, Chih-Yen; Jou, Jing-Yang; Lai, Bo-Cheng Charles |
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