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Taiwan Academic Institutional Repository >
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"jou jy"
Showing items 61-67 of 67 (7 Page(s) Totally)
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| 國立交通大學 |
2014-12-08T15:25:24Z |
Estimating likelihood of correctness for error candidates to assist debugging faulty HDL designs
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Jiang, TY; Liu, CNJ; Jou, JY |
| 國立交通大學 |
2014-12-08T15:25:10Z |
Stimulus generation for interface protocol verification using the non-deterministic extended finite state machine model
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Shih, CH; Huang, JD; Jou, JY |
| 國立交通大學 |
2014-12-08T15:25:10Z |
An optimum algorithm for compacting error traces for efficient functional debugging
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Yen, CC; Jou, JY |
| 國立交通大學 |
2014-12-08T15:18:21Z |
An efficient heterogeneous tree multiplexer synthesis technique
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Huang, HW; Wang, CY; Jou, JY |
| 國立交通大學 |
2014-12-08T15:17:44Z |
Reliable crosstalk-driven interconnect optimization
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Jiang, IHR; Pan, SR; Chang, YW; Jou, JY |
| 國立交通大學 |
2014-12-08T15:03:04Z |
TIMING-DRIVEN PARTIAL SCAN
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JOU, JY; CHENG, KT |
| 國立交通大學 |
2014-12-08T15:01:26Z |
A variable partitioning algorithm of BDD for FPGA technology mapping
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Jiang, JH; Jou, JY; Huang, JD; Wei, JS |
Showing items 61-67 of 67 (7 Page(s) Totally)
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