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Institution Date Title Author
國立交通大學 2014-12-08T15:49:17Z Static power analysis for power-driven synthesis Yuan, SY; Chen, KH; Jou, JY; Kuo, SY
國立交通大學 2014-12-08T15:48:55Z Sensitisable-path-oriented clustered voltage scaling technique for low power Jou, JY; Chou, DS
國立交通大學 2014-12-08T15:48:51Z Power-oriented partial-scan design approach Jou, JY; Nien, MC
國立交通大學 2014-12-08T15:48:47Z Special issue on hardware description languages - Foreword Jou, JY; Lin, YL
國立交通大學 2014-12-08T15:48:47Z A logical fault model for library coherence checking Tung, SW; Jou, JY
國立交通大學 2014-12-08T15:47:21Z On circuit clustering for area/delay tradeoff under capacity and pin constraints Huang, JD; Jou, JY; Shen, WZ; Chuang, HH
國立交通大學 2014-12-08T15:46:14Z A structure-oriented power modeling technique for macrocells Lin, JY; Shen, WZ; Jou, JY
國立交通大學 2014-12-08T15:46:03Z Internet-based hierarchical floorplan design Lin, JH; Jou, JY; Jiang, IHR
國立交通大學 2014-12-08T15:45:37Z On computing the minimum feedback vertex set of a directed graph by contraction operations Lin, HM; Jou, JY
國立交通大學 2014-12-08T15:45:10Z An automatic controller extractor for HDL descriptions at the RTL Liu, CNJ; Jou, JY

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