|
|
Taiwan Academic Institutional Repository >
Browse by Author
|
"jou shyh jye"
Showing items 26-35 of 182 (19 Page(s) Totally)
<< < 1 2 3 4 5 6 7 8 9 10 > >>
View [10|25|50] records per page
| 國立交通大學 |
2017-04-21T06:50:09Z |
A 802.15.3c/802.11ad Compliant 24 Gb/s FFT Processor for 60 GHz Communication Systems
|
Davila, Henry Lopez; Liu, Chun-Yi; Liu, Wei-Chang; Huang, Shen-Jui; Jou, Shyh-Jye; Chen, Sau-Gee |
| 國立交通大學 |
2017-04-21T06:50:06Z |
A Subthreshold SRAM with Embedded Data-Aware Write-Assist and Adaptive Data-Aware Keeper
|
Chiu, Yi-Wei; Hu, Yu-Hao; Zhao, Jun-Kai; Jou, Shyh-Jye; Chuang, Ching-Te |
| 國立交通大學 |
2017-04-21T06:50:05Z |
A Memory Access Reordering Polyphase Network for 60 GHz FBMC-OQAM Baseband Receiver
|
Liu, Chun-Yi; Sie, Meng-Siou; Leong, Edmund Wen Jen; Yao, Yu-Cheng; Jen, Chih-Wei; Jou, Shyh-Jye |
| 國立交通大學 |
2017-04-21T06:49:33Z |
10Gbps Decision Feedback Equalizer with Dynamic Lookahead Decision Loop
|
Lin, Yu-Chun; Shiue, Muh-Tian; Jou, Shyh-Jye |
| 國立交通大學 |
2017-04-21T06:49:31Z |
Interference Measurement and Analysis of Full-Duplex Wireless System in 60 GHz Band
|
Yang, Hung-Wei; He, Yongyu; Jen, Chih-Wei; Liu, Chun-Yi; Jou, Shyh-Jye; Yin, Xuefeng; Ma, Meng; Jiao, Bingli |
| 國立交通大學 |
2017-04-21T06:49:05Z |
Concurrent digital Adaptive Decision Feedback Equalizer for 10GBase-LX4 Ethernet system
|
Lin, Chi-Shiung; Lin, Yu-Chun; Jou, Shyh-Jye; Shiou, Mun-Tian |
| 國立交通大學 |
2017-04-21T06:49:05Z |
A 28nm 36kb High Speed 6T SRAM with Source Follower PMOS Read and Bit-Line Under-Drive
|
Hong, Chi-Hao; Chiu, Yi-Wei; Zhao, Jun-Kai; Jou, Shyh-Jye; Wang, Wen-Tai; Lee, Reed |
| 國立交通大學 |
2017-04-21T06:49:00Z |
ERROR-RESILIENT SEQUENTIAL CELLS WITH SUCCESSIVE TIME BORROWING FOR STOCHASTIC COMPUTING
|
Liu, Wei-Chang; Chan, Ching-Da; Huang, Shuo-An; Lo, Chi-Wei; Yang, Chia-Hsiang; Jou, Shyh-Jye |
| 國立交通大學 |
2017-04-21T06:48:56Z |
Subthreshold SRAM Macro Design with Pulse-Controlled Dynamic Voltage Scaling (PC-DVS)
|
Zhao, Jun-Kai; Chiu, Yi-Wei; Jou, Shyh-Jye; Chu, Yuan-Hua |
| 國立交通大學 |
2017-04-21T06:48:54Z |
An 8X-Parallelism Memory Access Reordering Polyphase Network for 60 GHz FBMC-OQAM Baseband Receiver
|
Liu, Chun-Yi; Sie, Meng-Siou; Leong, Edmund Wen Jen; Yao, Yu-Cheng; Lopez, Henry; Jen, Chih-Wei; Liu, Wei-Chang; Jou, Shyh-Jye |
Showing items 26-35 of 182 (19 Page(s) Totally)
<< < 1 2 3 4 5 6 7 8 9 10 > >>
View [10|25|50] records per page
|
