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Showing items 46-70 of 182  (8 Page(s) Totally)
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Institution Date Title Author
國立交通大學 2015-11-26T01:02:08Z 60 GHz多載波濾波器組系統之相位雜訊消除與取樣頻率偏移追蹤等化器 姚宇誠; Yao, Yu-Cheng; 周世傑; 劉志尉; Jou, Shyh-Jye; Liu, Chih-Wei
國立交通大學 2015-11-26T01:02:06Z 單一載波、正交分頻多工、濾波器組三模組基頻接收機系統於60GHZ頻帶應用 謝孟修; Sie, Meng-Siou; 周世傑; Jou, Shyh-Jye
國立交通大學 2015-11-26T01:02:05Z 應用於60 GHZ通信系統之高吞吐量FFT處理器設計 羅立; Lopez Davila Henry; 周世傑; Jou, Shyh-Jye
國立交通大學 2015-11-26T00:55:33Z 應用於序列傳輸系統之突發式時脈資料回復電路與全數位式展頻時脈產生器 蘇明銓; Su, Ming-Chiuan; 周世傑; 陳巍仁; Jou, Shyh-Jye; Chen, Wei-Zen
國立交通大學 2015-11-26T00:55:24Z 60GHz室內無線Gb/s SC/OFDM基頻接收器的FPGA 雛型設計 安若楠; Arya ,Pranav; 周世傑; Jou, Shyh-Jye
國立交通大學 2015-07-21T11:20:58Z A 40 nm 512 kb Cross-Point 8 T Pipeline SRAM With Binary Word-Line Boosting Control, Ripple Bit-Line and Adaptive Data-Aware Write-Assist Lien, Nan-Chun; Chu, Li-Wei; Chen, Chien-Hen; Yang, Hao-I.; Tu, Ming-Hsien; Kan, Paul-Sen; Hu, Yong-Jyun; Chuang, Ching-Te; Jou, Shyh-Jye; Hwang, Wei
國立交通大學 2015-07-21T11:20:48Z Blind ICA detection based on second-order cone programming for MC-CDMA systems Jen, Chih-Wei; Jou, Shyh-Jye
國立交通大學 2015-07-21T08:31:28Z An IEEE 802.15.3c/802.11ad Compliant SC/OFDM Dual-Mode Baseband Receiver for 60 GHz Band Liu, Wei-Chang; Yeh, Fu-Chun; Wu, Chia-Yi; Wei, Ting-Chen; Huang, Ya-Shiue; Huang, Shen-Jui; Chan, Ching-Da; Jou, Shyh-Jye; Chen, Sau-Gee
國立交通大學 2015-07-21T08:31:16Z An Ultra-Low Voltage Hearing Aid Chip using Variable-Latency Design Technique Chang, Kuo-Chiang; Luo, Shien-Chun; Huang, Ching-Ji; Liu, Chih-Wei; Chu, Yuan-Hua; Jou, Shyh-Jye
國立交通大學 2015-07-21T08:31:06Z AN EFFICIENT 18-BAND QUASI-ANSI 1/3-OCTAVE FILTER BANK USING RE-SAMPLING METHOD FOR DIGITAL HEARING AIDS Yang, Cheng-Yen; Liu, Chih-Wei; Jou, Shyh-Jye
國立交通大學 2015-07-21T08:31:06Z A 10Gbps, 1.24pJ/bit, Burst-Mode Clock and Data Recovery with Jitter Suppression Su, Ming-Chiuan; Chen, Wei-Zen; Wu, Pei-Si; Chen, Yu-Hsian; Lee, Chao-Cheng; Jou, Shyh-Jye
國立交通大學 2015-07-21T08:31:00Z A 40nm 1.0Mb 6T Pipeline SRAM with Digital-Based Bit-Line Under-Drive, Three-Step-Up Word-Line, Adaptive Data-Aware Write-Assist with VCS Tracking and Adaptive Voltage Detector for Boosting Control Liao, Wei-Nan; Lien, Nan-Chun; Chang, Chi-Shin; Chu, Li-Wei; Yang, Hao-I; Chuang, Ching-Te; Jou, Shyh-Jye; Hwang, Wei; Tu, Ming-Hsien; Huang, Huan-Shun; Wang, Jian-Hao; Kan, Paul-Sen; Hu, Yong-Jyun
國立交通大學 2015-07-21T08:29:40Z A 0.325 V, 600-kHz, 40-nm 72-kb 9T Subthreshold SRAM with Aligned Boosted Write Wordline and Negative Write Bitline Write-Assist Lu, Chien-Yu; Chuang, Ching-Te; Jou, Shyh-Jye; Tu, Ming-Hsien; Wu, Ya-Ping; Huang, Chung-Ping; Kan, Paul-Sen; Huang, Huan-Shun; Lee, Kuen-Di; Kao, Yung-Shin
國立交通大學 2015-07-21T08:29:26Z A Low-Jitter Cell-Based Digitally Controlled Oscillator With Differential Multiphase Outputs Su, Ming-Chiuan; Jou, Shyh-Jye; Chen, Wei-Zen
國立交通大學 2015-07-21T08:29:01Z All-Digital Synchronization for SC/OFDM Mode of IEEE 802.15.3c and IEEE 802.11ad Liu, Wei-Chang; Wei, Ting-Chen; Huang, Ya-Shiue; Chan, Ching-Da; Jou, Shyh-Jye
國立交通大學 2015-07-21T08:28:41Z A 10-Gb/s, 1.24 pJ/bit, Burst-Mode Clock and Data Recovery With Jitter Suppression Su, Ming-Chiuan; Chen, Wei-Zen; Wu, Pei-Si; Chen, Yu-Hsiang; Lee, Chao-Cheng; Jou, Shyh-Jye
國立交通大學 2015-07-21T08:27:55Z Analysis and implementation of low-power perceptual multiband noise reduction for the hearing aids application Wei, Cheng-Wen; Tsai, Cheng-Chun; Yi FanJiang; Chang, Tian-Sheuan; Jou, Shyh-Jye
國立交通大學 2014-12-16T06:15:25Z DISTURB-FREE STATIC RANDOM ACCESS MEMORY CELL Chuang Ching-Te; Yang Hao-I; Lin Jihi-Yu; Yang Shyh-Chyi; Tu Ming-Hsien; Hwang Wei; Jou Shyh-Jye; Lee Kun-Ti; Li Hung-Yu
國立交通大學 2014-12-16T06:15:18Z STATIC RANDOM ACCESS MEMORY WITH DATA CONTROLLED POWER SUPPLY Chuang Ching-Te; Yang Hao-I; Hsia Mao-Chih; Lin Yung-Wei; Lu Chien-Yu; Tu Ming-Hsien; Hwang Wei; Jou Shyh-Jye; Chen Chia-Cheng; Shih Wei-Chiang
國立交通大學 2014-12-16T06:15:16Z ASYMMETRIC VIRTUAL-GROUND SINGLE-ENDED SRAM AND SYSTEM THEREOF JOU Shyh-Jye; Lin Jhih-Yu; Chuang Ching-Te; Tu Ming-Hsien; Tsai Ming-Chien
國立交通大學 2014-12-16T06:14:56Z SINGLE-ENDED SRAM WITH CROSS-POINT DATA-AWARE WRITE OPERATION Jou Shyh-Jye; Lin Jhih-Yu; Chuang Ching-Te; Tu Ming-Hsien; Chiu Yi-Wei
國立交通大學 2014-12-16T06:14:56Z SRAM based on 6 transistor structure including a first inverter, a second inverter, a first pass-gate transistor, and a second pass-gate transistor CHUANG Ching-Te; Jou Shyh-Jye; Hwang Wei; Lin Yi-Wei; Tsai Ming-Chien; Yang Hao-I; Tu Ming-Hsien; Shih Wei-Chiang; Lien Nan-Chun; Lee Kuen-Di
國立交通大學 2014-12-16T06:14:56Z Oscillator based on a 6T SRAM for measuring the Bias Temperature Instability Chuang Ching-Te; Jou Shyh-Jye; Hwang Wei; Tsai Ming-Chien; Lin Yi-Wei; Yang Hao-I; Tu Ming-Hsien; Shih Wei-Chiang; Lien Nan-Chun; Lee Kuen-Di
國立交通大學 2014-12-16T06:14:49Z STATIC RANDOM ACCESS MEMORY WITH RIPPLE BIT LINES/SEARCH LINES FOR IMROVING CURRENT LEAKAGE/VARIATION TOLERANCE AND DENSITY/PERFORMANCE CHUANG Ching-Te; YANG Hao-I; LU Chien-Yu; CHEN Chien-Hen; CHANG Chi-Shin; HUANG Po-Tsang; LAI Shu-Lin; HWANG Wei; JOU Shyh-Jye; TU Ming-Hsien
國立交通大學 2014-12-16T06:14:10Z Disturb-free static random access memory cell Chuang Ching-Te; Yang Hao-I; Lin Jihi-Yu; Yang Shyh-Chyi; Tu Ming-Hsien; Hwang Wei; Jou Shyh-Jye; Lee Kun-Ti; Li Hung-Yu

Showing items 46-70 of 182  (8 Page(s) Totally)
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View [10|25|50] records per page