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"jou shyh jye"的相關文件
顯示項目 131-155 / 182 (共8頁)
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| 國立交通大學 |
2014-12-08T15:36:49Z |
40 nm Bit-Interleaving 12T Subthreshold SRAM With Data-Aware Write-Assist
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Chiu, Yi-Wei; Hu, Yu-Hao; Tu, Ming-Hsien; Zhao, Jun-Kai; Chu, Yuan-Hua; Jou, Shyh-Jye; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:36:30Z |
Low Complexity Formant Estimation Adaptive Feedback Cancellation for Hearing Aids Using Pitch Based Processing
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Yi FanChiang; Wei, Cheng-Wen; Meng, Yi-Le; Lin, Yu-Wen; Jou, Shyh-Jye; Chang, Tian-Sheuan |
| 國立交通大學 |
2014-12-08T15:36:13Z |
A 40 nm 0.32 V 3.5 MHz 11T Single-Ended Bit-Interleaving Subthreshold SRAM with Data-Aware Write-Assist
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Chiu, Yi-Wei; Hu, Yu-Hao; Tu, Ming-Hsien; Zhao, Jun-Kai; Jou, Shyh-Jye; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:35:45Z |
A SC/HSI Dual-Mode Baseband Receiver with Frequency-Domain Equalizer for IEEE 802.15.3c
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Liu, Wei-Chang; Yeh, Fu-Chun; Wei, Ting-Chen; Huang, Ya-Shiue; Liu, Tai-Yang; Huang, Shen-Jui; Chan, Ching-Da; Jou, Shyh-Jye; Chen, Sau-Gee |
| 國立交通大學 |
2014-12-08T15:35:45Z |
A 40nm 1.0Mb Pipeline 6T SRAM with Variation-Tolerant Step-Up Word-Line and Adaptive Data-Aware Write-Assist
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Chang, Chi-Shin; Yang, Hao-I; Liao, Wei-Nan; Lin, Yi-Wei; Lien, Nan-Chun; Chen, Chien-Hen; Chuang, Ching-Te; Hwang, Wei; Jou, Shyh-Jye; Tu, Ming-Hsien; Huang, Huan-Shun; Hu, Yong-Jyun; Kan, Paul-Sen; Cheng, Cheng-Yo; Wang, Wei-Chang; Wang, Jian-Hao; Lee, Kuen-Di; Chen, Chia-Cheng; Shih, Wei-Chiang |
| 國立交通大學 |
2014-12-08T15:35:17Z |
A PITCH BASED VAD ADOPTING QUASI-ANSI 1/3 OCTAVE FILTER BANK WITH 11.3 ms LATENCY FOR MONOSYLLABLE HEARING AIDS
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Huang, Yi-Cheng; Yi FanChiang; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-08T15:35:17Z |
SPATIAL-CUE-BASED MULTI-BAND BINAURAL NOISE REDUCTION FOR HEARING AIDS
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Yang, Cheng-Yen; Chou, Wen-Sheng; Chang, Kuo-Chiang; Liu, Chih-Wei; Chi, Tai-Shih; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-08T15:35:05Z |
Neuromorphic Pitch Based Noise Reduction for Monosyllable Hearing Aid System Application
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Chen, Yu-Jui; Wei, Cheng-Wen; Yi FanChiang; Meng, Yi-Le; Huang, Yi-Cheng; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-08T15:33:44Z |
A Low-Power Level-Converting Double-Edge-Triggered Flip-Flop Design
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Wang, Li-Rong; Lo, Kai-Yu; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-08T15:33:12Z |
Power and Area Reduction in Multi-Stage Addition Using Operand Segmentation
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Chan, Ching-Da; Liu, Wei-Chang; Yang, Chia-Hsiang; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-08T15:32:50Z |
Well-Structured Modified Booth Multiplier and Its Application to Reconfigurable MAC Design
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Wang, Li-Rong; Tu, Ming-Hsien; Jou, Shyh-Jye; Lee, Chung-Len |
| 國立交通大學 |
2014-12-08T15:32:18Z |
A Low-Overhead Interference Canceller for High-Mobility STBC-OFDM Systems
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Chen, Hsiao-Yun; Chang, Wei-Kai; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-08T15:32:16Z |
A Digital Golay-MPIC Time Domain Equalizer for SC/OFDM Dual-Modes at 60 GHz Band
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Liu, Wei-Chang; Yeh, Fu-Chun; Wei, Ting-Chen; Chan, Ching-Da; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-08T15:30:07Z |
Testing Strategies for a 9T Sub-threshold SRAM
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Yang, Hao-Yu; Lin, Chen-Wei; Chen, Hung-Hsin; Chao, Mango C. -T.; Tu, Ming-Hsien; Jou, Shyh-Jye; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:30:06Z |
High-Performance 0.6V V-MIN 55nm 1.0Mb 6T SRAM with Adaptive BL Bleeder
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Yang, Hao-I; Lin, Yi-Wei; Hsia, Mao-Chih; Lin, Geng-Cing; Chang, Chi-Shin; Chen, Yin-Nien; Chuang, Ching-Te; Hwang, Wei; Jou, Shyh-Jye; Lien, Nan-Chun; Li, Hung-Yu; Lee, Kuen-Di; Shih, Wei-Chiang; Wu, Ya-Ping; Lee, Wen-Ta; Hsu, Chih-Chiang |
| 國立交通大學 |
2014-12-08T15:30:06Z |
An All-Digital Bit Transistor Characterization Scheme for CMOS 6T SRAM Array
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Lin, Geng-Cing; Wang, Shao-Cheng; Lin, Yi-Wei; Tsai, Ming-Chien; Chuang, Ching-Te; Jou, Shyh-Jye; Lien, Nan-Chun; Shih, Wei-Chiang; Lee, Kuen-Di; Chu, Jyun-Kai |
| 國立交通大學 |
2014-12-08T15:30:04Z |
A 80-uW 2-Mb/s Transceiver for Human Body Channel Binaural Communication
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Sun, Jhih-Cing; Chen, Jou-Ling; Shen, Yi-Hung; You, Shiu-Chain; Jou, Shyh-Jye; Sang, Tzu-Hsien |
| 國立交通大學 |
2014-12-08T15:30:04Z |
A Low-Power Body-Channel Communication System for Binaural Hearing Aids
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Chen, Jou-Ling; Sun, Jhih-Cing; Shen, Yi-Hung; Sang, Tzu-Hsien; Chang, Tian-Sheuan; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-08T15:30:03Z |
Design and Implementation of Dynamic Word-Line Pulse Write Margin Monitor for SRAM
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Wang, Shao-Cheng; Lin, Geng-Cing; Lin, Yi-Wei; Tsai, Ming-Chien; Chiu, Yi-Wei; Jou, Shyh-Jye; Chuang, Ching-Te; Lien, Nan-Chun; Shih, Wei-Chiang; Lee, Kuen-Di; Chu, Jyun-Kai |
| 國立交通大學 |
2014-12-08T15:29:40Z |
A 0.33-V, 500-kHz, 3.94-mu W 40-nm 72-Kb 9T Subthreshold SRAM With Ripple Bit-Line Structure and Negative Bit-Line Write-Assist
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Lu, Chien-Yu; Tu, Ming-Hsien; Yang, Hao-I; Wu, Ya-Ping; Huang, Huan-Shun; Lin, Yuh-Jiun; Lee, Kuen-Di; Kao, Yung-Shin; Chuang, Ching-Te; Jou, Shyh-Jye; Hwang, Wei |
| 國立交通大學 |
2014-12-08T15:28:44Z |
STBC-OFDM Downlink Baseband Receiver for Mobile WMAN
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Chen, Hsiao-Yun; Lin, Jyun-Nan; Hu, Hsiang-Sheng; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-08T15:28:24Z |
Low Computational Complexity Pitch Based VAD for Dynamic Environment in Hearing Aids
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Chen, Yu-Jui; Wei, Cheng-Wen; Meng, Yi-Le; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-08T15:25:40Z |
Novel FFT Processor with Parallel-In-Parallel-Out in Normal Order
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Hu, Hsiang-Sheng; Chen, Hsiao-Yun; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-08T15:25:16Z |
A Spread Spectrum Clock Generator with Phase-rotation Algorithm for 6Gbps Clock and Data Recovery
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Lin, Chi-Hsien; Huang, Yen-Ying; Li, Shu-Rung; Cheng, Yuan-Pu; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-08T15:24:50Z |
Memory reduction ICFO estimation architecture for DVB-T
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Wei, Ting-Zhen; Jou, Shyh-Jye |
顯示項目 131-155 / 182 (共8頁)
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