|
"jou shyh jye"的相關文件
顯示項目 51-60 / 182 (共19頁)
<< < 1 2 3 4 5 6 7 8 9 10 > >>
每頁顯示[10|25|50]項目
| 國立交通大學 |
2015-07-21T11:20:58Z |
A 40 nm 512 kb Cross-Point 8 T Pipeline SRAM With Binary Word-Line Boosting Control, Ripple Bit-Line and Adaptive Data-Aware Write-Assist
|
Lien, Nan-Chun; Chu, Li-Wei; Chen, Chien-Hen; Yang, Hao-I.; Tu, Ming-Hsien; Kan, Paul-Sen; Hu, Yong-Jyun; Chuang, Ching-Te; Jou, Shyh-Jye; Hwang, Wei |
| 國立交通大學 |
2015-07-21T11:20:48Z |
Blind ICA detection based on second-order cone programming for MC-CDMA systems
|
Jen, Chih-Wei; Jou, Shyh-Jye |
| 國立交通大學 |
2015-07-21T08:31:28Z |
An IEEE 802.15.3c/802.11ad Compliant SC/OFDM Dual-Mode Baseband Receiver for 60 GHz Band
|
Liu, Wei-Chang; Yeh, Fu-Chun; Wu, Chia-Yi; Wei, Ting-Chen; Huang, Ya-Shiue; Huang, Shen-Jui; Chan, Ching-Da; Jou, Shyh-Jye; Chen, Sau-Gee |
| 國立交通大學 |
2015-07-21T08:31:16Z |
An Ultra-Low Voltage Hearing Aid Chip using Variable-Latency Design Technique
|
Chang, Kuo-Chiang; Luo, Shien-Chun; Huang, Ching-Ji; Liu, Chih-Wei; Chu, Yuan-Hua; Jou, Shyh-Jye |
| 國立交通大學 |
2015-07-21T08:31:06Z |
AN EFFICIENT 18-BAND QUASI-ANSI 1/3-OCTAVE FILTER BANK USING RE-SAMPLING METHOD FOR DIGITAL HEARING AIDS
|
Yang, Cheng-Yen; Liu, Chih-Wei; Jou, Shyh-Jye |
| 國立交通大學 |
2015-07-21T08:31:06Z |
A 10Gbps, 1.24pJ/bit, Burst-Mode Clock and Data Recovery with Jitter Suppression
|
Su, Ming-Chiuan; Chen, Wei-Zen; Wu, Pei-Si; Chen, Yu-Hsian; Lee, Chao-Cheng; Jou, Shyh-Jye |
| 國立交通大學 |
2015-07-21T08:31:00Z |
A 40nm 1.0Mb 6T Pipeline SRAM with Digital-Based Bit-Line Under-Drive, Three-Step-Up Word-Line, Adaptive Data-Aware Write-Assist with VCS Tracking and Adaptive Voltage Detector for Boosting Control
|
Liao, Wei-Nan; Lien, Nan-Chun; Chang, Chi-Shin; Chu, Li-Wei; Yang, Hao-I; Chuang, Ching-Te; Jou, Shyh-Jye; Hwang, Wei; Tu, Ming-Hsien; Huang, Huan-Shun; Wang, Jian-Hao; Kan, Paul-Sen; Hu, Yong-Jyun |
| 國立交通大學 |
2015-07-21T08:29:40Z |
A 0.325 V, 600-kHz, 40-nm 72-kb 9T Subthreshold SRAM with Aligned Boosted Write Wordline and Negative Write Bitline Write-Assist
|
Lu, Chien-Yu; Chuang, Ching-Te; Jou, Shyh-Jye; Tu, Ming-Hsien; Wu, Ya-Ping; Huang, Chung-Ping; Kan, Paul-Sen; Huang, Huan-Shun; Lee, Kuen-Di; Kao, Yung-Shin |
| 國立交通大學 |
2015-07-21T08:29:26Z |
A Low-Jitter Cell-Based Digitally Controlled Oscillator With Differential Multiphase Outputs
|
Su, Ming-Chiuan; Jou, Shyh-Jye; Chen, Wei-Zen |
| 國立交通大學 |
2015-07-21T08:29:01Z |
All-Digital Synchronization for SC/OFDM Mode of IEEE 802.15.3c and IEEE 802.11ad
|
Liu, Wei-Chang; Wei, Ting-Chen; Huang, Ya-Shiue; Chan, Ching-Da; Jou, Shyh-Jye |
顯示項目 51-60 / 182 (共19頁)
<< < 1 2 3 4 5 6 7 8 9 10 > >>
每頁顯示[10|25|50]項目
|
