| 國立交通大學 |
2014-12-12T01:37:35Z |
奈米級CMOS靜態隨機存取記憶體之負/正偏壓溫度效應劣化現象與雜訊邊界量測電路
|
蔡銘謙; Tsai, Ming-Chien; 周世傑; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-12T01:37:31Z |
IEEE 802.15.3c 之同步偵測的設計與實作
|
黃雅雪; Huang, Ya-Shiue; 周世傑; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-12T01:37:31Z |
IEEE 802.15.3c 之多碼率低密度同位元檢查解碼器及編碼器的設計與實作
|
洪祥譽; Hung, Shiang-Yu; 周世傑; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-12T01:27:19Z |
應用於單載波室內無線接收器之快速適應頻率域通道等化器之設計
|
劉代暘; Liu, Tai-Yang; 周世傑; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-12T01:27:17Z |
低電壓操作靜態隨機存取記憶體的設計與實現
|
林志宇; Lin, Jihi-Yu; 周世傑; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-12T01:27:13Z |
應用於序列傳輸系統之10-Gbps離散時間適應性等化器
|
許馥淳; Hsu, Fu-Chun; 周世傑; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-12T01:27:13Z |
適用於展頻時脈產生器之全數位鎖相迴路
|
蘇明銓; Su, Ming-Chiuan; 周世傑; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-12T01:24:38Z |
多模式通道解碼器應用於無線通訊系統之設計與實現
|
嚴紹維; Yen, Shao-Wei; 周世傑; 張錫嘉; Jou, Shyh-Jye; Chang, Hsie-Chia |
| 國立交通大學 |
2014-12-12T01:24:38Z |
超低功耗次臨界操作靜態隨機存取記憶體的設計與實現
|
杜明賢; Tu, Ming-Hsien; 周世傑; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-12T01:24:37Z |
適用於全耳道式數位助聽器之低耗電雜訊及回授消除系統設計
|
魏誠文; Wei, Cheng-Wen; 周世傑; 張添烜; Jou, Shyh-Jye; Chang, Tian-Sheuan |
| 國立交通大學 |
2014-12-12T01:24:33Z |
應用於Serial ATA之全數位展頻時脈產生器及數位可程式化之高斯時脈產生器
|
莊立; Chuang Li; 周世傑; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-12T01:21:18Z |
十億級資料傳輸室內無線SC/OFDM接收器之相位雜訊消除演算法及設計
|
吳佳怡; Wu, Chia-Yi; 周世傑; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-08T15:46:21Z |
A reconfigurable MAC architecture implemented with mixed-V(t) standard cell library
|
Wang, Li-Rong; Chiu, Yi-Wei; Hu, Chia-Lin; Tu, Ming-Hsien; Jou, Shyh-Jye; Lee, Chung-Len |
| 國立交通大學 |
2014-12-08T15:46:18Z |
Symbol and carrier frequency offset synchronization for IEEE802.16e
|
Lin, Jyun-Nan; Chen, Hsiao-Yun; Wei, Ting-Chen; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-08T15:36:57Z |
Continuous-flow Parallel Bit-Reversal Circuit for MDF and MDC FFT Architectures
|
Chen, Sau-Gee; Huang, Shen-Jui; Garrido, Mario; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-08T15:36:49Z |
40 nm Bit-Interleaving 12T Subthreshold SRAM With Data-Aware Write-Assist
|
Chiu, Yi-Wei; Hu, Yu-Hao; Tu, Ming-Hsien; Zhao, Jun-Kai; Chu, Yuan-Hua; Jou, Shyh-Jye; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:36:30Z |
Low Complexity Formant Estimation Adaptive Feedback Cancellation for Hearing Aids Using Pitch Based Processing
|
Yi FanChiang; Wei, Cheng-Wen; Meng, Yi-Le; Lin, Yu-Wen; Jou, Shyh-Jye; Chang, Tian-Sheuan |
| 國立交通大學 |
2014-12-08T15:36:13Z |
A 40 nm 0.32 V 3.5 MHz 11T Single-Ended Bit-Interleaving Subthreshold SRAM with Data-Aware Write-Assist
|
Chiu, Yi-Wei; Hu, Yu-Hao; Tu, Ming-Hsien; Zhao, Jun-Kai; Jou, Shyh-Jye; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:35:45Z |
A SC/HSI Dual-Mode Baseband Receiver with Frequency-Domain Equalizer for IEEE 802.15.3c
|
Liu, Wei-Chang; Yeh, Fu-Chun; Wei, Ting-Chen; Huang, Ya-Shiue; Liu, Tai-Yang; Huang, Shen-Jui; Chan, Ching-Da; Jou, Shyh-Jye; Chen, Sau-Gee |
| 國立交通大學 |
2014-12-08T15:35:45Z |
A 40nm 1.0Mb Pipeline 6T SRAM with Variation-Tolerant Step-Up Word-Line and Adaptive Data-Aware Write-Assist
|
Chang, Chi-Shin; Yang, Hao-I; Liao, Wei-Nan; Lin, Yi-Wei; Lien, Nan-Chun; Chen, Chien-Hen; Chuang, Ching-Te; Hwang, Wei; Jou, Shyh-Jye; Tu, Ming-Hsien; Huang, Huan-Shun; Hu, Yong-Jyun; Kan, Paul-Sen; Cheng, Cheng-Yo; Wang, Wei-Chang; Wang, Jian-Hao; Lee, Kuen-Di; Chen, Chia-Cheng; Shih, Wei-Chiang |
| 國立交通大學 |
2014-12-08T15:35:17Z |
A PITCH BASED VAD ADOPTING QUASI-ANSI 1/3 OCTAVE FILTER BANK WITH 11.3 ms LATENCY FOR MONOSYLLABLE HEARING AIDS
|
Huang, Yi-Cheng; Yi FanChiang; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-08T15:35:17Z |
SPATIAL-CUE-BASED MULTI-BAND BINAURAL NOISE REDUCTION FOR HEARING AIDS
|
Yang, Cheng-Yen; Chou, Wen-Sheng; Chang, Kuo-Chiang; Liu, Chih-Wei; Chi, Tai-Shih; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-08T15:35:05Z |
Neuromorphic Pitch Based Noise Reduction for Monosyllable Hearing Aid System Application
|
Chen, Yu-Jui; Wei, Cheng-Wen; Yi FanChiang; Meng, Yi-Le; Huang, Yi-Cheng; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-08T15:33:44Z |
A Low-Power Level-Converting Double-Edge-Triggered Flip-Flop Design
|
Wang, Li-Rong; Lo, Kai-Yu; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-08T15:33:12Z |
Power and Area Reduction in Multi-Stage Addition Using Operand Segmentation
|
Chan, Ching-Da; Liu, Wei-Chang; Yang, Chia-Hsiang; Jou, Shyh-Jye |
