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"jou shyh jye"的相关文件
显示项目 131-140 / 182 (共19页)
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| 國立交通大學 |
2014-12-08T15:36:49Z |
40 nm Bit-Interleaving 12T Subthreshold SRAM With Data-Aware Write-Assist
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Chiu, Yi-Wei; Hu, Yu-Hao; Tu, Ming-Hsien; Zhao, Jun-Kai; Chu, Yuan-Hua; Jou, Shyh-Jye; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:36:30Z |
Low Complexity Formant Estimation Adaptive Feedback Cancellation for Hearing Aids Using Pitch Based Processing
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Yi FanChiang; Wei, Cheng-Wen; Meng, Yi-Le; Lin, Yu-Wen; Jou, Shyh-Jye; Chang, Tian-Sheuan |
| 國立交通大學 |
2014-12-08T15:36:13Z |
A 40 nm 0.32 V 3.5 MHz 11T Single-Ended Bit-Interleaving Subthreshold SRAM with Data-Aware Write-Assist
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Chiu, Yi-Wei; Hu, Yu-Hao; Tu, Ming-Hsien; Zhao, Jun-Kai; Jou, Shyh-Jye; Chuang, Ching-Te |
| 國立交通大學 |
2014-12-08T15:35:45Z |
A SC/HSI Dual-Mode Baseband Receiver with Frequency-Domain Equalizer for IEEE 802.15.3c
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Liu, Wei-Chang; Yeh, Fu-Chun; Wei, Ting-Chen; Huang, Ya-Shiue; Liu, Tai-Yang; Huang, Shen-Jui; Chan, Ching-Da; Jou, Shyh-Jye; Chen, Sau-Gee |
| 國立交通大學 |
2014-12-08T15:35:45Z |
A 40nm 1.0Mb Pipeline 6T SRAM with Variation-Tolerant Step-Up Word-Line and Adaptive Data-Aware Write-Assist
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Chang, Chi-Shin; Yang, Hao-I; Liao, Wei-Nan; Lin, Yi-Wei; Lien, Nan-Chun; Chen, Chien-Hen; Chuang, Ching-Te; Hwang, Wei; Jou, Shyh-Jye; Tu, Ming-Hsien; Huang, Huan-Shun; Hu, Yong-Jyun; Kan, Paul-Sen; Cheng, Cheng-Yo; Wang, Wei-Chang; Wang, Jian-Hao; Lee, Kuen-Di; Chen, Chia-Cheng; Shih, Wei-Chiang |
| 國立交通大學 |
2014-12-08T15:35:17Z |
A PITCH BASED VAD ADOPTING QUASI-ANSI 1/3 OCTAVE FILTER BANK WITH 11.3 ms LATENCY FOR MONOSYLLABLE HEARING AIDS
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Huang, Yi-Cheng; Yi FanChiang; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-08T15:35:17Z |
SPATIAL-CUE-BASED MULTI-BAND BINAURAL NOISE REDUCTION FOR HEARING AIDS
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Yang, Cheng-Yen; Chou, Wen-Sheng; Chang, Kuo-Chiang; Liu, Chih-Wei; Chi, Tai-Shih; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-08T15:35:05Z |
Neuromorphic Pitch Based Noise Reduction for Monosyllable Hearing Aid System Application
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Chen, Yu-Jui; Wei, Cheng-Wen; Yi FanChiang; Meng, Yi-Le; Huang, Yi-Cheng; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-08T15:33:44Z |
A Low-Power Level-Converting Double-Edge-Triggered Flip-Flop Design
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Wang, Li-Rong; Lo, Kai-Yu; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-08T15:33:12Z |
Power and Area Reduction in Multi-Stage Addition Using Operand Segmentation
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Chan, Ching-Da; Liu, Wei-Chang; Yang, Chia-Hsiang; Jou, Shyh-Jye |
显示项目 131-140 / 182 (共19页)
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