| 國立交通大學 |
2017-04-21T06:50:09Z |
A 802.15.3c/802.11ad Compliant 24 Gb/s FFT Processor for 60 GHz Communication Systems
|
Davila, Henry Lopez; Liu, Chun-Yi; Liu, Wei-Chang; Huang, Shen-Jui; Jou, Shyh-Jye; Chen, Sau-Gee |
| 國立交通大學 |
2017-04-21T06:50:06Z |
A Subthreshold SRAM with Embedded Data-Aware Write-Assist and Adaptive Data-Aware Keeper
|
Chiu, Yi-Wei; Hu, Yu-Hao; Zhao, Jun-Kai; Jou, Shyh-Jye; Chuang, Ching-Te |
| 國立交通大學 |
2017-04-21T06:50:05Z |
A Memory Access Reordering Polyphase Network for 60 GHz FBMC-OQAM Baseband Receiver
|
Liu, Chun-Yi; Sie, Meng-Siou; Leong, Edmund Wen Jen; Yao, Yu-Cheng; Jen, Chih-Wei; Jou, Shyh-Jye |
| 國立交通大學 |
2017-04-21T06:49:33Z |
10Gbps Decision Feedback Equalizer with Dynamic Lookahead Decision Loop
|
Lin, Yu-Chun; Shiue, Muh-Tian; Jou, Shyh-Jye |
| 國立交通大學 |
2017-04-21T06:49:31Z |
Interference Measurement and Analysis of Full-Duplex Wireless System in 60 GHz Band
|
Yang, Hung-Wei; He, Yongyu; Jen, Chih-Wei; Liu, Chun-Yi; Jou, Shyh-Jye; Yin, Xuefeng; Ma, Meng; Jiao, Bingli |
| 國立交通大學 |
2017-04-21T06:49:05Z |
Concurrent digital Adaptive Decision Feedback Equalizer for 10GBase-LX4 Ethernet system
|
Lin, Chi-Shiung; Lin, Yu-Chun; Jou, Shyh-Jye; Shiou, Mun-Tian |
| 國立交通大學 |
2017-04-21T06:49:05Z |
A 28nm 36kb High Speed 6T SRAM with Source Follower PMOS Read and Bit-Line Under-Drive
|
Hong, Chi-Hao; Chiu, Yi-Wei; Zhao, Jun-Kai; Jou, Shyh-Jye; Wang, Wen-Tai; Lee, Reed |
| 國立交通大學 |
2017-04-21T06:49:00Z |
ERROR-RESILIENT SEQUENTIAL CELLS WITH SUCCESSIVE TIME BORROWING FOR STOCHASTIC COMPUTING
|
Liu, Wei-Chang; Chan, Ching-Da; Huang, Shuo-An; Lo, Chi-Wei; Yang, Chia-Hsiang; Jou, Shyh-Jye |
| 國立交通大學 |
2017-04-21T06:48:56Z |
Subthreshold SRAM Macro Design with Pulse-Controlled Dynamic Voltage Scaling (PC-DVS)
|
Zhao, Jun-Kai; Chiu, Yi-Wei; Jou, Shyh-Jye; Chu, Yuan-Hua |
| 國立交通大學 |
2017-04-21T06:48:54Z |
An 8X-Parallelism Memory Access Reordering Polyphase Network for 60 GHz FBMC-OQAM Baseband Receiver
|
Liu, Chun-Yi; Sie, Meng-Siou; Leong, Edmund Wen Jen; Yao, Yu-Cheng; Lopez, Henry; Jen, Chih-Wei; Liu, Wei-Chang; Jou, Shyh-Jye |
| 國立交通大學 |
2017-04-21T06:48:27Z |
A 802.15.3c/802.11ad Dual Mode Phase Noise Cancellation for 60 GHz Communication Systems
|
Huang, Liang-Yu; Wu, Chia-Yi; Liu, Chun-Yi; Liu, Wei-Chang; Wu, Chih-Feng; Jou, Shyh-Jye |
| 國立交通大學 |
2017-04-21T06:48:25Z |
Adaptive quadrature clock generator
|
Huang, Juin-Hau; Lin, Chih Hsien; Jou, Shyh-Jye |
| 國立交通大學 |
2017-04-21T06:48:24Z |
A 3.52 Gb/s mmWave Baseband with Delayed Decision Feedback Sequence Estimation in 40 nm
|
Preyss, Nicholas; Senning, Christian; Burg, Andreas; Liu, Wei-Chang; Liu, Chun-Yi; Jou, Shyh-Jye |
| 國立交通大學 |
2016-03-29T00:01:11Z |
智慧型眼鏡助聽器---子計畫二：影像輔助語音處理
|
周世傑; JOU SHYH-JYE |
| 國立交通大學 |
2016-03-28T08:17:52Z |
智慧型眼鏡助聽器---子計畫二：影像輔助語音處理
|
周世傑; JOU SHYH-JYE |
| 國立交通大學 |
2015-12-04T07:03:10Z |
STATIC MEMORY CELL
|
Chuang Ching-Te; Chang Chih-Hao; Chung Chao-Kuei; Lu Chien-Yu; Jou Shyh-Jye; Tu Ming-Hsien |
| 國立交通大學 |
2015-12-02T02:59:25Z |
A Near-Threshold Cell-Based All-Digital PLL with Hierarchical Band-Selection G-DCO for Fast Lock-In and Low-Power Applications
|
Chang, Chia-Wen; Chu, Yuan-Hua; Jou, Shyh-Jye |
| 國立交通大學 |
2015-12-02T02:59:17Z |
High-Accuracy Fixed-Width Booth Multipliers Based on Probability and Simulation
|
He, Wen-Quan; Chen, Yuan-Ho; Jou, Shyh-Jye |
| 國立交通大學 |
2015-11-26T01:07:22Z |
十億級資料傳輸室內無線SC/OFDM接收機之等化器
|
葉福鈞; Yeh, Fu-Chun; 周世傑; Jou, Shyh-Jye |
| 國立交通大學 |
2015-11-26T01:02:12Z |
60GHz FBMC 基頻接收器之符元間干擾與載波間干擾抑制等化器
|
梁文禎; Leong, Edmund Wen Jen; 周世傑; Jou, Shyh-Jye |
| 國立交通大學 |
2015-11-26T01:02:08Z |
60 GHz多載波濾波器組系統之相位雜訊消除與取樣頻率偏移追蹤等化器
|
姚宇誠; Yao, Yu-Cheng; 周世傑; 劉志尉; Jou, Shyh-Jye; Liu, Chih-Wei |
| 國立交通大學 |
2015-11-26T01:02:06Z |
單一載波、正交分頻多工、濾波器組三模組基頻接收機系統於60GHZ頻帶應用
|
謝孟修; Sie, Meng-Siou; 周世傑; Jou, Shyh-Jye |
| 國立交通大學 |
2015-11-26T01:02:05Z |
應用於60 GHZ通信系統之高吞吐量FFT處理器設計
|
羅立; Lopez Davila Henry; 周世傑; Jou, Shyh-Jye |
| 國立交通大學 |
2015-11-26T00:55:33Z |
應用於序列傳輸系統之突發式時脈資料回復電路與全數位式展頻時脈產生器
|
蘇明銓; Su, Ming-Chiuan; 周世傑; 陳巍仁; Jou, Shyh-Jye; Chen, Wei-Zen |
| 國立交通大學 |
2015-11-26T00:55:24Z |
60GHz室內無線Gb/s SC/OFDM基頻接收器的FPGA 雛型設計
|
安若楠; Arya ,Pranav; 周世傑; Jou, Shyh-Jye |
