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Showing items 11-20 of 48  (5 Page(s) Totally)
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Institution Date Title Author
臺大學術典藏 2020-06-11T07:06:10Z A low-power low-cost fully-integrated 60-GHz transceiver system with OOK modulation and on-board antenna assembly Lee, J.;Chen, Y.;Huang, Y.; Lee, J.; Chen, Y.; Huang, Y.; JRI LEE
臺大學術典藏 2020-06-11T07:06:10Z A 21-Gb/s 87-mW transceiver with FFE/DFE/analog equalizer in 65-nm CMOS technology Wang, H.;Lee, J.; Wang, H.; Lee, J.; JRI LEE
臺大學術典藏 2020-06-11T07:06:09Z Study of Subharmonically Injection-Locked PLLs Lee, Jri;Wang, Huaide; Lee, Jri; Wang, Huaide; JRI LEE
臺大學術典藏 2020-06-11T07:06:09Z A 75-GHz phase-locked loop in 90-nm CMOS technology Lee, J.;Liu, M.;Wang, H.; Lee, J.; Liu, M.; Wang, H.; JRI LEE
臺大學術典藏 2020-06-11T07:06:09Z A 20-Gb/s Full-Rate Linear Clock and Data Recovery Circuit With Automatic Frequency Acquisition Lee, Jri;Wu, Ke-Chung; Lee, Jri; Wu, Ke-Chung; JRI LEE
臺大學術典藏 2020-06-11T07:06:07Z An 87GHz QPSK transceiver with costas-loop carrier recovery in 65nm CMOS Huang, S.-J.; Yeh, Y.-C.; Wang, H.; Chen, P.-N.; Lee, J.; JRI LEE; Huang, S.-J.;Yeh, Y.-C.;Wang, H.;Chen, P.-N.;Lee, J.
臺大學術典藏 2020-06-11T07:06:07Z 100Gb/s ethernet chipsets in 65nm CMOS technology Jiang, J.-Y.;Chiang, P.-C.;Hung, H.-W.;Lin, C.-L.;Yoon, T.;Lee, J.; Jiang, J.-Y.; Chiang, P.-C.; Hung, H.-W.; Lin, C.-L.; Yoon, T.; Lee, J.; JRI LEE
臺大學術典藏 2020-06-11T07:06:07Z A 94GHz 3D-image radar engine with 4TX/4RX beamforming scan technique in 65nm CMOS Chen, P.-N.;Peng, P.-J.;Kao, C.;Chen, Y.-L.;Lee, J.; Chen, P.-N.; Peng, P.-J.; Kao, C.; Chen, Y.-L.; Lee, J.; JRI LEE
臺大學術典藏 2020-06-11T07:06:07Z A 40Gb/s TX and RX chip set in 65nm CMOS Chen, M.-S.;Shih, Y.-N.;Lin, C.-L.;Hung, H.-W.;Lee, J.; Chen, M.-S.; Shih, Y.-N.; Lin, C.-L.; Hung, H.-W.; Lee, J.; JRI LEE
臺大學術典藏 2020-06-11T07:06:07Z 60Gb/s NRZ and PAM4 transmitters for 400GbE in 65nm CMOS Chiang, P.-C.;Hung, H.-W.;Chu, H.-Y.;Chen, G.-S.;Lee, J.; Chiang, P.-C.; Hung, H.-W.; Chu, H.-Y.; Chen, G.-S.; Lee, J.; JRI LEE

Showing items 11-20 of 48  (5 Page(s) Totally)
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