臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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"jung lin yang"

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Showing items 11-20 of 24 (3 Page(s) Totally)
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Institution	Date	Title	Author
南台科技大學	2006-11	Technology-Independent Synthesis for Channel-Level Asynchronous System,	Jung-Lin Yang; Hsu-Ching Tien
南台科技大學	2006-11	Channel-Level Synthesis for Asynchronous Circuit Design	Jung-Lin Yang; Hsu-Ching Tien
南台科技大學	2006-08	Improved Technique on Parallelism for Asynchronous Controllers	Jung-Lin Yang; Erik Brunvand
南台科技大學	2006-05	High-Level Synthesis for Self-Timed Systems	Hsu-Ching Tien; Jung-Lin Yang
南台科技大學	2006-03	非同步VLSI設計通道層描述簡介	楊榮林; Jung-Lin Yang
南台科技大學	2005-12	Self-Timed Circuits Using Single-Rail DCVSL Template	Jung-Lin Yang; Erik Brunvand
南台科技大學	2005-12	HDL Modeling for Optimization and Verification of Asynchronous Controllers	Jung-Lin Yang; Erik Brunvand; Sung-Min Lin
南台科技大學	2005-08	Pseudo Dynamic DCVSL Template For Power-Conservative Design	Jung-Lin Yang; Erik Brunvand
南台科技大學	2005-08	HDL Modeling for Optimization and Verification Of Extended Burst-Mode	Jung-Lin Yang; Erik Brunvand; Sung-Min Lin
南台科技大學	2005-08	An Asymmetrical Low-Power Tunable Delay Element	Jung-Lin Yang; Wen-Yueh Lai; Chen-Chia Yang

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