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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
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2019臺灣學術機構典藏
研討會
機構典藏系統RC7版本已
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Institution Date Title Author
臺大學術典藏 2018-09-10T08:18:16Z A phase-locked loop with background leakage current compensation Jung-Yu Chang;Shen-Iuan Liu; Jung-Yu Chang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T08:18:16Z A phase-locked loop with background leakage current compensation Jung-Yu Chang;Shen-Iuan Liu; Jung-Yu Chang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:42:00Z A frequency synthesizer for mode-1 MB-OFDM UWB applications Jung-Yu Chang;Che-Wei Fan;Shen-Iuan Liu; Jung-Yu Chang; Che-Wei Fan; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:42:00Z A frequency synthesizer for mode-1 MB-OFDM UWB applications Jung-Yu Chang;Che-Wei Fan;Shen-Iuan Liu; Jung-Yu Chang; Che-Wei Fan; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:41:58Z A 1.5GHz phase-locked loop with leakage current suppression in 65nm CMOS Jung-Yu Chang;Shen-Iuan Liu; Jung-Yu Chang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:41:58Z A 1.5GHz phase-locked loop with leakage current suppression in 65nm CMOS Jung-Yu Chang;Shen-Iuan Liu; Jung-Yu Chang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:41:56Z A single-PLL UWB frequency synthesizer using multiphase coupled ring oscillator and current-reused multiplier Jung-Yu Chang;Che-Wei Fan;Che-Fu Liang;Shen-Iuan Liu; Jung-Yu Chang; Che-Wei Fan; Che-Fu Liang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:41:56Z A single-PLL UWB frequency synthesizer using multiphase coupled ring oscillator and current-reused multiplier Jung-Yu Chang;Che-Wei Fan;Che-Fu Liang;Shen-Iuan Liu; Jung-Yu Chang; Che-Wei Fan; Che-Fu Liang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:08:37Z A 15-20GHz delay-locked loop in 90nm CMOS technology Jung-Yu Chang;Chi-Nan Chuang;Shen-Iuan Liu; Jung-Yu Chang; Chi-Nan Chuang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T07:08:37Z A 15-20GHz delay-locked loop in 90nm CMOS technology Jung-Yu Chang;Chi-Nan Chuang;Shen-Iuan Liu; Jung-Yu Chang; Chi-Nan Chuang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T06:35:19Z A DLL-based variable-phase clock buffer Chao-Chyun Chen; Jung-Yu Chang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T06:02:31Z A spur-reduction technique for a 5-GHz frequency synthesizer Chun-Yi Kuo; Jung-Yu Chang; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T05:27:05Z A low-phase-noise low-phase-error 2.4GHz CMOS quadrature VCO Jung-Yu Chang; Chia-Hsin Wu; Shen-Iuan Liu; SHEN-IUAN LIU
臺大學術典藏 2018-09-10T04:59:19Z An AC-coupled Quadrature LC tank VCO Jung-Yu Chang; Shen-Iuan Liu; SHEN-IUAN LIU

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