臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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Institution	Date	Title	Author
國立中山大學	2009-11	A Simulation Study of the Thermal Effects in an SBT Thin-Film Transistor	Yi-Hsuan Fan;Jyi-Tsong Lin;Yu-Che Chang;Cheng-Hsin Chen;Kuan-Yu Lu;Chih-Hsuan Tai;Yi Chuen Eng
國立中山大學	2009-11	Advanced MOS Device Design Considerations	Meng-Hsuch Chiang;Chun-Yu Chen;Jyi-Tsong Lin
國立中山大學	2009-11	A Non-Classical Self-Aligned _-Shaped Source/Drain Ultrathin SOI Transistor for Future Planar MOSFET Technology	Jyi-Tsong Lin;Yi-Chuen Eng;Po-Hsieh Lin;Tzu-Feng Chang;Chih-Hung Sun;Chih-Hao Kuo
國立中山大學	2009-07	Characteristics of a Local Oxidation of silicon multi-tie body polysilicon thin-film transistor	Hsien-Nan Chiu;Jyi-Tsong Lin;Yi-Chuen Eng;Po-Hiesh Lin;Tzu-Feng Chang;Chih-Hung Sun;Hsuan-Hsu Chen;Chih-Hao Kuo
國立中山大學	2009-07	A Novel Self-Align Double Gate MOSFET with Source/Drain Tie	Po-Hsieh Lin;Jyi-Tsong Lin;Yi-Chuen Eng
國立中山大學	2009-07	A simulation study of source/drain-tie effects on characteristics of self-aligned π-shaped source/drain ultrathin SOI FETs	Yi-Chuen Eng;Jyi-Tsong Lin;Tzu-Feng Chang
國立中山大學	2009-07	Advanced Block Oxide MOSFETs for 25 nm Technology Node	Chih-Hung Sun;Jyi-Tsong Lin;Yi-Chuen Eng;Tzu-Feng Chang;Po-Hiesh Lin;Hsuan-Hsu Chen;Chih-Hao Kuo;Hsien-Nan Chiu
國立中山大學	2009-07	Self-Aligned SOI MOSFETs with Ω-Shaped Conductive Layer and Source/Drain-Tie	Jyi-Tsong Lin;Tzu-Feng Chang;Yi-Chuen Eng;Hsuan-Hsu Chen;Chih-Hao Kuo;Chih-Hung Sun;Po-Hiesh Lin;Hsien-Nan Chiu
國立中山大學	2009-07	Improving Reliability and Diminishing Parasitic Capacitance Effects in a Vertical Transistor with Embedded Gate	Jyi-Tsong Lin;Chih-Hao Kuo;Tai-Yi Lee;Yi-Chuen Eng;Tzu-Feng Chang;Po-Hsieh Lin;Hsuan-Hsu Chen
國立中山大學	2009-06	The impact of Junction Depth on Vertical Sidewall MOSFETs with Embedded Gate	Chih-Hao Kuo;Jyi-Tsong Lin;Tai-Yi Lee;Yi-Chuen Eng;Tzu-Feng Chang;Po-Hsieh Lin;Hsuan-Hsu Chen;Chih-Hung Sun;Hsien-Nan Chiu

Showing items 1-10 of 156 (16 Page(s) Totally)
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