English  |  正體中文  |  简体中文  |  2832427  
???header.visitor??? :  33774054    ???header.onlineuser??? :  1273
???header.sponsordeclaration???
 
臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
???ui.leftmenu.abouttair???

???ui.leftmenu.bartitle???

???index.news???

???ui.leftmenu.copyrighttitle???

???ui.leftmenu.link???

"jyi tsong lin"???jsp.browse.items-by-author.description???

???jsp.browse.items-by-author.back???
???jsp.browse.items-by-author.order1??? ???jsp.browse.items-by-author.order2???

Showing items 1-50 of 156  (4 Page(s) Totally)
1 2 3 4 > >>
View [10|25|50] records per page

Institution Date Title Author
國立中山大學 2009-11 A Simulation Study of the Thermal Effects in an SBT Thin-Film Transistor Yi-Hsuan Fan;Jyi-Tsong Lin;Yu-Che Chang;Cheng-Hsin Chen;Kuan-Yu Lu;Chih-Hsuan Tai;Yi Chuen Eng
國立中山大學 2009-11 Advanced MOS Device Design Considerations Meng-Hsuch Chiang;Chun-Yu Chen;Jyi-Tsong Lin
國立中山大學 2009-11 A Non-Classical Self-Aligned _-Shaped Source/Drain Ultrathin SOI Transistor for Future Planar MOSFET Technology Jyi-Tsong Lin;Yi-Chuen Eng;Po-Hsieh Lin;Tzu-Feng Chang;Chih-Hung Sun;Chih-Hao Kuo
國立中山大學 2009-07 Characteristics of a Local Oxidation of silicon multi-tie body polysilicon thin-film transistor Hsien-Nan Chiu;Jyi-Tsong Lin;Yi-Chuen Eng;Po-Hiesh Lin;Tzu-Feng Chang;Chih-Hung Sun;Hsuan-Hsu Chen;Chih-Hao Kuo
國立中山大學 2009-07 A Novel Self-Align Double Gate MOSFET with Source/Drain Tie Po-Hsieh Lin;Jyi-Tsong Lin;Yi-Chuen Eng
國立中山大學 2009-07 A simulation study of source/drain-tie effects on characteristics of self-aligned π-shaped source/drain ultrathin SOI FETs Yi-Chuen Eng;Jyi-Tsong Lin;Tzu-Feng Chang
國立中山大學 2009-07 Advanced Block Oxide MOSFETs for 25 nm Technology Node Chih-Hung Sun;Jyi-Tsong Lin;Yi-Chuen Eng;Tzu-Feng Chang;Po-Hiesh Lin;Hsuan-Hsu Chen;Chih-Hao Kuo;Hsien-Nan Chiu
國立中山大學 2009-07 Self-Aligned SOI MOSFETs with Ω-Shaped Conductive Layer and Source/Drain-Tie Jyi-Tsong Lin;Tzu-Feng Chang;Yi-Chuen Eng;Hsuan-Hsu Chen;Chih-Hao Kuo;Chih-Hung Sun;Po-Hiesh Lin;Hsien-Nan Chiu
國立中山大學 2009-07 Improving Reliability and Diminishing Parasitic Capacitance Effects in a Vertical Transistor with Embedded Gate Jyi-Tsong Lin;Chih-Hao Kuo;Tai-Yi Lee;Yi-Chuen Eng;Tzu-Feng Chang;Po-Hsieh Lin;Hsuan-Hsu Chen
國立中山大學 2009-06 The impact of Junction Depth on Vertical Sidewall MOSFETs with Embedded Gate Chih-Hao Kuo;Jyi-Tsong Lin;Tai-Yi Lee;Yi-Chuen Eng;Tzu-Feng Chang;Po-Hsieh Lin;Hsuan-Hsu Chen;Chih-Hung Sun;Hsien-Nan Chiu
國立中山大學 2009-05 Self-Aligned Silicon-On-Insulator MOSFETs with Ω-Shaped Conductive Layer Tzu-Feng Chang;Jyi-Tsong Lin;Yi-Chuen Eng;Chih-Hung Sun;Po-Hiesh Lin;Hsien-Nan Chiu;Hsuan-Hsu Chen;Chih-Hao Kuo
國立中山大學 2009-05 A Novel Poly-silicon Thin-Film Transistor with Multi-Trenched Body Formed by Using Isotropic-etching for Suppressing Off-State Leakage Hsien-Nan Chiu;Jyi-Tsong Lin;Yi-Chuen Eng;Po-Hiesh Lin;Tzu-Feng Chang;Chih-Hung Sun;Chih-Hao Kuo;Hsuan-Hsu Chen
國立中山大學 2009-05 Self-Aligned Block-Oxide Quasi-SOI MOSFETs with S/D-Tie Chih-Hung Sun; Jyi-Tsong Lin; Yi-Chuen Eng; Tzu-Feng Chang; Po-Hiesh Lin; Hsuan-Hsu Chen; Chih-Hao Kuo; Hsien-Nan Chiu
國立中山大學 2009-05 A Novel Double Gate MOSFET with Self-Align Process and Source/Drain Tie Jyi-Tsong Lin;Po-Hsieh Lin;Yi-Chuen Eng
國立中山大學 2009-05 An Improved Vertical Embedded Sidewall-Gate MOSFET for Reducing Parasitic Capacitance and Suppressing Kink Effects Chih-Hao Kuo;Jyi-Tsong Lin;Tai-Yi Lee;Yi-Chuen Eng;Tzu-Feng Chang
國立中山大學 2009-05 Simulation Study of Novel FinFET Devices with connected body Jyi-Tsong Lin;Po-Hsieh Lin;Yi-Chuen Eng
國立中山大學 2009-05 Future of Planar Self-Aligned Block Oxide Based MOSFET Technology Jyi-Tsong Lin;Yi-Chuen Eng;Chih-Hao Kuo;Tzu-Feng Chang;Chih-Hung Sun;Po-Hsieh Lin;Hsien-Nan Chiu;Hsuan-Hsu Chen
國立中山大學 2009-05 A Novel Poly-Si Thin-Film Transistor with Multi-Trenched Body by Using Isotropic-etching for Suppressing Off-State Leakage Hsien-Nan Chiu;Jyi-Tsong Lin;Yi-Chuen Eng;Po-Hiesh Lin;Tzu-Feng Chang;Chih-Hung Sun;Chih-Hao Kuo;Hsuan-Hsu Chen
國立中山大學 2009-05 A Novel Double Gate MOSFET with Self-align Process and Source/Drain Tie Po-Hsieh Lin;Jyi-Tsong Lin;Yi-Chuen Eng
國立中山大學 2009-04 A Vertical Transistor with Embedded Gate for Reducing Parasitic Overlap Capacitance Chih-Hao Kuo;Jyi-Tsong Lin;Tai-Yi Lee;Yi-Chuen Eng;Tzu-Feng Chang
國立中山大學 2009-04 A Novel Polysilicon Thin-Film Transistor with Multi-Trenched Body by Using Isotropic-etching for Suppressing Off-State Leakage Hsien-Nan Chiu;Jyi-Tsong Lin;Yi-Chuen Eng;Po-Hiesh Lin;Tzu-Feng Chang
國立中山大學 2009-04 Study of bMOS and bMPI for 25 nm technology node Chih-Hung Sun; Jyi-Tsong Lin; Yi-Chuen Eng; Tzu-Feng Chang; Po-Hiesh Lin; Hsuan-Hsu Chen; Chih-Hao Kuo; Hsien-Nan Chiu
國立中山大學 2009-04 Self-Aligned Silicon-On-Insulator Transistors with Ω-Shaped Conductive Layer and Source/Drain-Tie: A Simulation Study Tzu-Feng Chang;Jyi-Tsong Lin;Yi-Chuen Eng;Chih-Hao Kuo;Chih-Hung Sun;Po-Hiesh Lin;Hsien-Nan Chiu;Hsuan-Hsu Chen
國立中山大學 2009-04 A New Novel FinFET Device Po-Hsieh Lin;Jyi-Tsong Lin;Yi-Chuen Eng
國立中山大學 2009-04 A Simulation Study of Source/Drain-Tie Effects on the Short-Channel Characteristics of SA-ΠFETs Jyi-Tsong Lin;Yi-Chuen Eng
國立中山大學 2009-03 Study of New Novel FinFET Device with Its Bodies been Connected Jyi-Tsong Lin;Po-Hsieh Lin;Yi-Chuen Eng
國立中山大學 2008-11 Performances of the Capacitorless 1T-DRAM using Polycrystalline Silicon Thin-Film Transistors with Trenched Body Jyi-Tsong Lin;Kuo-Dong Huang;Bao-Tang Jheng
國立中山大學 2008-10 The Influence of the Source/Drain-tie Length in a Novel Self-Aligned S/D tie SOI for Improving Self-heating Jyi-Tsong Lin;Shiang-Shi Kang;Yi-Chuen Eng;Yi-Ming Tseng;Ying-Chieh Tasi;Hung-Jen Tseng
國立中山大學 2008-10 Novel Vertical Sidewall MOSFETs with Embedded Gate Tai-Yi Lee;Jyi-Tsong Lin;Kao-Cheng Lin
國立中山大學 2008-10 Thermal Stability of a High Performance PTGVMOS with Native-tie Ying-Chieh Tsai;Jyi-Tsong Lin;Yi-Chuen Eng;Shiang-Shi Kang;Yi-Ming Tseng;Hung-Jen Tseng
國立中山大學 2008-10 A New Process for Self-aligned Silicon-On-Insulator with Block Oxide and Its Memory Application for 1T-DRAM Yi-Ming Tseng;Jyi-Tsong Lin;Yi-Chuen Eng;Shiang-Shi Kang;Hung-Jen Tseng;Ying-Chieh Tsai
國立中山大學 2008-10 Misalignment Issue between the Si-body and the Gate of a 30nm bSPIFET Hung-Jen Tseng;Jyi-Tsong Lin;Yi-Chuen Eng;Bao-Tang Jheng;Yi-Ming Tseng;Shiang-Shi Kang
國立中山大學 2008-09 Characteristics and Reliability of Polysilicon Thin-Film Transistor with Multiple Trench Body Kuo-Dong Huang;Jyi-Tsong Lin;Bao-Tang Jheng
國立中山大學 2008-09 A High Performance Polysilicon Thin-Film Transistor Built on a Trenched Body Jyi-Tsong Lin;Kuo-Dong Huang
國立中山大學 2008-08 A Novel Pseudo Tri-Gate Vertical MOSFET with Source/Drain tie Jyi-Tsong Lin;Ying-Chieh Tsai;Yi-Chuen Eng;Yi-Ming Tseng;Shiang-Shi Kang
國立中山大學 2008-08 Simulation of the Multi-Source/Drain SOI MOSFET Jyi-Tsong Lin;Po-Hsieh Lin;Yi-Chuen Eng;Shiang-Shi Kang
國立中山大學 2008-06 Short-channel Characteristics of Self-aligned π-shaped Source/Drain Ultra-thin SOI MOSFETs Jyi-Tsong Lin;Yi-Chuen Eng;Hau-Yuan Huang;Shiang-Shi Kang;Po-Hsieh Lin
國立中山大學 2008-06 An SOI-based Self-aligned Quasi-SOI MOSFET with π-shaped Semiconductor Conductive Layer Yi-Chuen Eng;Jyi-Tsong Lin;Shiang-Shi Kang
國立中山大學 2008-06 An Advanced Non-classical Self-aligned Quasi-SOI MOSFET with π-shaped Semiconductor Conductive Layer to Ease Ultra-shallow Junction Requirement Jyi-Tsong Lin;Yi-Chuen Eng;Ying-Chieh Tsai;Hung-Jen Tseng;Yi-Ming Tseng;Po-Hsieh Lin
國立中山大學 2008-06 A Study of LBO Effects in a 40 nm SA-MSCFET Jyi-Tsong Lin;Yi-Chuen Eng;Shiang-Shi Kang
國立中山大學 2008-05 A 2-D simulation study and characterization of a novel vertical SOI MOSFET with a smart source body tie Jyi-Tsong Lin;Tai-Yi Lee;Kao-Cheng Lin
國立中山大學 2008-05 Non-classical polycrystalline silicon thin-film transistor with embedded block-oxide for suppressing short channel effect Jyi-Tsong Lin;Kuo-Dong Huang;Shu-Fen Hu
國立中山大學 2008-05 Analysis of Block Oxide Height Variations for a 40nm Gate Length bFDSOI-FET Jyi-Tsong Lin;Yi-Chuen Eng
國立中山大學 2008-05 The Novel Embedded Vertical Sidewall MOSFETs Jyi-Tsong Lin;Tai-Yi Lee;Kao-Cheng Lin
國立中山大學 2008-05 The Influence of the Source/drain-tie Length on the SOI Based Transistors Jyi-Tsong Lin;Shiang-Shi Kang;Yi-Chuen Eng
國立中山大學 2008-05 A Compensation Threshold Voltage Shift Pixel Circuit For Active Matrix Organic Light Emitting Diode Cheng-Neng Wen;Jyi-Tsong Lin
國立中山大學 2008-05 The Effect of Block Oxide Height on a Self-aligned Source/Drain-tied nBOFET Jyi-Tsong Lin;Yi-Chuen Eng;Shiang-Shi Kang;Po-Hsieh Lin;Yi-Ming Tzeng;Jeng-Da Lin
國立中山大學 2008-05 Source/Drain-tied Bottom Gate MOSFET for Device Reliability Improvement Jeng-Da Lin;Jyi-Tsong Lin;Kung-Kai Kao;Shiang-Shi Kang;Yi-Chuen Eng;Po-Hsieh Lin
國立中山大學 2008-05 A Novel Vertical Sidewall MOSFET Using Smart Source/Body Contact without Floating-Body Effect Tai-Yi Lee;Jyi-Tsong Lin;Yi-Chuen Eng;Kao-Cheng Lin
國立中山大學 2008-05 Self-aligned π-shaped Source/Drain Ultra-thin SOI MOSFETs Yi-Chuen Eng;Jyi-Tsong Lin;Hau-Yuan Huang;Shiang-Shi Kang;Po-Hsieh Lin;Kung-Kai Kao

Showing items 1-50 of 156  (4 Page(s) Totally)
1 2 3 4 > >>
View [10|25|50] records per page