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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
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Showing items 51-75 of 156  (7 Page(s) Totally)
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Institution Date Title Author
國立中山大學 2008-05 A Novel Vertical Sidewall MOSFETs Using Smart Source/Body Contact without Floating-Body Effect Tai-Yi Lee;Jyi-Tsong Lin;Po-Hsieh Lin;Yi-Chuen Eng
國立中山大學 2008-05 A Novel Pseudo Tri-Gate VMOS for Enhancing Thermal Stability Jyi-Tsong Lin;Ying-Chieh Tsai;Yi-Chuen Eng
國立中山大學 2008-05 The Study of Influence of the Source/drain-tie Length in a S/D tie SOI for Improving Self-Heating Jyi-Tsong Lin;Shiang-Shi Kang;Yi-Chuen Eng
國立中山大學 2008-05 Misalignment of the gate to the body in a bSPIFET Jyi-Tsong Lin;Hung-Jen Tseng;Yi-Chuen Eng;Yi-Ming Tseng;Shiang-Shi Kang;Ying-Chieh Tasi
國立中山大學 2008-05 A Novel Structural Polysilicon Thin-Film Transistor with Trenched Body Technology Jyi-Tsong Lin;Kuo-Dong Huang;Bao-Tang Jheng
國立中山大學 2008-05 A Novel Multi-Source/Drain SOI MOSFET Jyi-Tsong Lin;Po-Hsieh Lin;Yi-Chuen Eng;Ying-Chieh Tasi;Hung-Jen Tseng;Yi-Ming Tseng
國立中山大學 2008-05 The Influence of the Source/drain-tie Length on the SOI Based Transistors Jyi-Tsong Lin;Shiang-Shi Kang;Yi-Chuen Eng;Yi-Ming Tseng;Ying-Chieh Tsai;Hung-Jen Tseng
國立中山大學 2008-05 A Novel SOI MOSFET with Multi-Source/Drain Jyi-Tsong Lin;Po-Hsieh Lin;Yi-Chuen Eng
國立中山大學 2007-12 A Novel Blocking Technology for Improving the Short-Channel Effects in Polycrystalline Silicon TFT Devices Jyi-Tsong Lin; Yi-Chuen Eng
國立中山大學 2007-12 Misalignment of the Block Oxide Height in Self-aligned Source/Drain-tied bFDSOI-FET Jyi-Tsong Lin;Yi-Chuen Eng;Kung-Kai Kao;Hau-Yuan Huang;Jeng-Da Lin;Shiang-Shi Kang
國立中山大學 2007-12 Impact of Source/Drain Tie on 30 nm Bottom Gate MOSFETs Jyi-Tsong Lin;Jeng-Da Lin;Shiang-Shi Kang;Hau-Yuan Huang;Kung-Kai Kao
國立中山大學 2007-12 A Novel Polysilicon Thin-Film Transistor with Multi-Trenched Body for Suppressing Off-State Leakage Jyi-Tsong Lin;Kuo-Dong Huang
國立中山大學 2007-11 Influence of Block Oxide Width on a Silicon on Partial Insulator Field-Effect Transistor Jyi-Tsong Lin; Yi-Chuen Eng
國立中山大學 2007-11 A Novel Middle-Gate-Double-Channel FET for high Reliability Use Hau-Yuan Huang;Jyi-Tsong Lin;Yi-Chuen Eng;Jeng-Da Lin;Kung-Kai Kao
國立中山大學 2007-11 Characteristics Study of Pillar Field-Effect Transistor for Future High Reliability application Jyi-Tsong Lin;Kung-Kai Kao;Jeng-Da Lin;Yi-Chuen Eng;Shiang-Shi Kang;Hau-Yuan Huang
國立中山大學 2007-11 A Non-Classical Polysilicon Thin-Film Transistor with Symmetric Trenched Body Jyi-Tsong Lin;Kuo-Dong Huang
國立中山大學 2007-09 Improvement of Self-heating Effects in Nanoscale Multi-substrate Contact Field-effect Transistors Yi-Chuen Eng;Jyi-Tsong Lin
國立中山大學 2007-09 Self-aligned Block Oxide Process for bSPIFETs Jyi-Tsong Lin;Yi-Chuen Eng
國立中山大學 2007-08 Self–Aligned Double Bits SONOS Cell and Its Memory Circuit Design Jyi-Tsong Lin;Wei-Ching Lin;Ho-Lin Lee
國立中山大學 2007-08 Novel Devices Merging RITD and CMOS for Future VLSI Use Jyi-Tsong Lin;Wei-Chin Lin;Chao-Yu Hou
國立中山大學 2007-07 Advanced π-FET Technology for 45 nm Technology Node Yi-Chuen Eng;Jyi-Tsong Lin
國立中山大學 2007-06 The Effect of N-Channel Polysilicon Thin-Film Transistors with Body-Block Spacers Jyi-Tsong Lin; Kuo-Dong Huang; Shu-Fen Hu
國立中山大學 2007-06 Oxide Islands Design for Elimination of Ultra-shallow Junction Formation Jyi-Tsong Lin;Yi-Chuen Eng
國立中山大學 2007-05 Source/Drain-Tied Poly-Si Thin-Film Transistor with Π-Shaped Active Region for Device Reliability Improvement Jyi-Tsong Lin; Yi-Chuen Eng
國立中山大學 2007-05 A New GAA Manufacture Process and Performance Evaluation Jyi-Tsong Lin;Ho-Ting Chen;Wei-Chin Lin

Showing items 51-75 of 156  (7 Page(s) Totally)
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