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"kang p y"的相关文件
显示项目 1-4 / 4 (共1页) 1 每页显示[10|25|50]项目
| 臺大學術典藏 |
2020-06-11T06:50:39Z |
On pre/post-bond testing and calibrating SAR ADC array in 3-D CMOS imager
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Huang, X.-L.;Kang, P.-Y.;Huang, J.-L.;Chou, Y.-F.;Lee, Y.-P.;Kwai, D.-M.; Huang, X.-L.; Kang, P.-Y.; Huang, J.-L.; Chou, Y.-F.; Lee, Y.-P.; Kwai, D.-M.; JIUN-LANG HUANG |
| 臺大學術典藏 |
2020-06-11T06:50:39Z |
On pre/post-bond testing and calibrating SAR ADC array in 3-D CMOS imager
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Huang, X.-L.;Kang, P.-Y.;Huang, J.-L.;Chou, Y.-F.;Lee, Y.-P.;Kwai, D.-M.; Huang, X.-L.; Kang, P.-Y.; Huang, J.-L.; Chou, Y.-F.; Lee, Y.-P.; Kwai, D.-M.; JIUN-LANG HUANG |
| 臺大學術典藏 |
2020-06-11T06:50:35Z |
Histogram-based calibration of capacitor mismatch and comparator offset for 1-bit/stage pipelined ADCs
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Huang, X.-L.;Kang, P.-Y.;Yu, Y.-C.;Huang, J.-L.; Huang, X.-L.; Kang, P.-Y.; Yu, Y.-C.; Huang, J.-L.; JIUN-LANG HUANG |
| 臺大學術典藏 |
2020-06-11T06:50:35Z |
Histogram-based calibration of capacitor mismatch and comparator offset for 1-bit/stage pipelined ADCs
|
Huang, X.-L.;Kang, P.-Y.;Yu, Y.-C.;Huang, J.-L.; Huang, X.-L.; Kang, P.-Y.; Yu, Y.-C.; Huang, J.-L.; JIUN-LANG HUANG |
显示项目 1-4 / 4 (共1页) 1 每页显示[10|25|50]项目
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