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机构 日期 题名 作者
臺大學術典藏 2021-09-14T23:19:15Z Design of a Bone-Guided Cochlear Implant Microsystem With Monopolar Biphasic Multiple Stimulations and Evoked Compound Action Potential Acquisition and Its In Vivo Verification Wang, Sung Hao; Huang, Yu Kai; Chen, Ching Yuan; Tang, Li Yang; Tu, Yen Fu; Chang, Po Chih; Lee, Chia Fone; CHIA-HSIANG YANG; Hung, Chung Chih; CHIEN-HAO LIU; Ker, Ming Dou; Wu, Chung Yu
臺大學術典藏 2021-03-14T23:24:53Z Improved design and in vivo animal tests of bone-guided cochlear implant microsystem with monopolar biphasic multiple stimulation and neural action potential acquisition Wang, Sung Hao; Huang, Yu Kai; Chen, Ching Yuan; Lee, Chia Fone; CHIA-HSIANG YANG; Hung, Chung Chih; CHIEN-HAO LIU; Ker, Ming Dou; Wu, Chung Yu
國立交通大學 2020-10-05T02:01:08Z RF/High-Speed I/O ESD Protection: Co-optimizing Strategy Between BEOL Capacitance and HBM Immunity in Advanced CMOS Process Wu, Wei-Min; Ker, Ming-Dou; Chen, Shih-Hung; Chen, Jie-Ting; Linten, Dimitri; Groeseneken, Guido
國立交通大學 2020-10-05T02:01:07Z On-Chip Over-Voltage Protection Design Against Surge Events on the CC Pin of USB Type-C Interface Ke, Chao-Yang; Ker, Ming-Dou
國立交通大學 2020-10-05T02:01:07Z Design of Fin-Diode-Triggered Rotated Silicon-Controlled Rectifier for High-Speed Digital Application in 16-nm FinFET Process Chang, Rong-Kun; Lin, Chun-Yu; Ker, Ming-Dou
國立交通大學 2020-10-05T02:00:29Z A 13.56 MHZ METAMATERIAL FOR THE WIRELESS POWER TRANSMISSION ENHANCEMENT IN IMPLANTABLE BIOMEDICAL DEVICES Chen, Kuan-Jung; Chen, Wei-Ming; Tan, Li-Yang; Cheng, Yu-Ting; Ker, Ming-Dou; Wu, Chung-Yu
國立交通大學 2020-10-05T01:59:50Z Energy Transformation Between the Inductor and the Power Transistor for the Unclamped Inductive Switching (UIS) Test Nidhi, Karuna; Lee, Jian-Hsing; Huang, Shao-Chang; Ker, Ming-Dou
臺大學術典藏 2020-06-11T06:51:01Z Design and In Vivo Verification of a CMOS Bone-Guided Cochlear Implant Microsystem. Qian, Xin-Hong;Wu, Yi-Chung;Yang, Tzu-Yi;Cheng, Cheng-Hsiang;Chu, Hsing-Chien;Cheng, Wan-Hsueh;Yen, Ting-Yang;Lin, Tzu-Han;Lin, Yung-Jen;Lee, Yu-Chi;Chang, Jia-Heng;Lin, Shih-Ting;Li, Shang-Hsuan;Wu, Tsung-Chen;Huang, Chien-Chang;Wang, Sung-Hao;Lee, Chia-Fone;Yang, Chia-Hsiang;Hung, Chung-Chih;Chi, Tai-Shih;Liu, Chien-Hao;Ker, Ming-Dou;Wu, Chung-Yu; Qian, Xin-Hong; Wu, Yi-Chung; Yang, Tzu-Yi; Cheng, Cheng-Hsiang; Chu, Hsing-Chien; Cheng, Wan-Hsueh; Yen, Ting-Yang; Lin, Tzu-Han; Lin, Yung-Jen; Lee, Yu-Chi; Chang, Jia-Heng; Lin, Shih-Ting; Li, Shang-Hsuan; Wu, Tsung-Chen; Huang, Chien-Chang; Wang, Sung-Hao; Lee, Chia-Fone; Yang, Chia-Hsiang; Hung, Chung-Chih; Chi, Tai-Shih; Liu, Chien-Hao; Ker, Ming-Dou; Wu, Chung-Yu; CHIA-HSIANG YANG
國立交通大學 2020-02-02T23:54:28Z Design of High-Voltage-Tolerant Power-Rail ESD Protection Circuit for Power Pin of Negative Voltage in Low-Voltage CMOS Processes Chang, Rong-Kun; Ker, Ming-Dou
國立交通大學 2020-01-02T00:04:19Z Design and In Vivo Verification of a CMOS Bone-Guided Cochlear Implant Microsystem Qian, Xin-Hong; Wu, Yi-Chung; Yang, Tzu-Yi; Cheng, Cheng-Hsiang; Chu, Hsing-Chien; Cheng, Wan-Hsueh; Yen, Ting-Yang; Lin, Tzu-Han; Lin, Yung-Jen; Lee, Yu-Chi; Chang, Jia-Heng; Lin, Shih-Ting; Li, Shang-Hsuan; Wu, Tsung-Chen; Huang, Chien-Chang; Wang, Sung-Hao; Lee, Chia-Fone; Yang, Chia-Hsiang; Hung, Chung-Chih; Chi, Tai-Shih; Liu, Chien-Hao; Ker, Ming-Dou; Wu, Chung-Yu
國立交通大學 2019-12-13T01:12:52Z On-chip Transient Detection Circuit for Microelectronic Systems against Electrical Transient Disturbances due to ESD Events Chen, Wen-Chieh; Ker, Ming-Dou
臺大學術典藏 2019-11-01 Design and in Vivo Verification of a CMOS Bone-Guided Cochlear Implant Microsystem Cheng, Wan Hsueh; Hung, Chung Chih; Huang, Chien Chang; Lin, Shih Ting; Wu, Chung Yu; Wang, Sung Hao; Ker, Ming Dou; Cheng, Cheng Hsiang; Yen, Ting Yang; Chang, Jia Heng; CHIEN-HAO LIU; Wu, Yi Chung; Qian, Xin Hong; Lin, Yung Jen; CHIEN-HAO LIU;CHIA-HSIANG YANG;Cheng, Wan Hsueh;Hung, Chung Chih;Huang, Chien Chang;Lin, Shih Ting;Wu, Chung Yu;Wang, Sung Hao;Ker, Ming Dou;Cheng, Cheng Hsiang;Yen, Ting Yang;Wu, Yi Chung;Chang, Jia Heng;Lin, Yung Jen;Qian, Xin Hong;Yang, Tzu Yi;Lee, Chia Fone;Chi, Tai Shih;Lee, Yu Chi;Chu, Hsing Chien;Wu, Tsung Chen;Li, Shang Hsuan;Lin, Tzu Han; Lin, Tzu Han; Li, Shang Hsuan; CHIA-HSIANG YANG; Wu, Tsung Chen; Chu, Hsing Chien; Lee, Yu Chi; Chi, Tai Shih; Lee, Chia Fone; Yang, Tzu Yi
國立交通大學 2019-10-05T00:09:47Z ESD Protection Design of High-Linearity SPDT CMOS T/R Switch for Cellular Applications Hung, Tao-Yi; Ker, Ming-Dou
國立交通大學 2019-10-05T00:08:47Z An Efficient, Wide-Output, High-Voltage Charge Pump With a Stage Selection Circuit Realized in a Low-Voltage CMOS Process Luo, Zhicong; Yu, Li-Chin; Ker, Ming-Dou
國立交通大學 2019-08-02T02:18:31Z An 82.9%-Efficiency Triple-Output Battery Management Unit for Implantable Neuron Stimulator in 180-nm Standard CMOS Liu, Chi-Wei; Chen, Yi-Lun; Liao, Pei-Chun; Lin, Shiau-Pin; Wang, Ting-Wei; Chung, Ming-Jie; Chen, Po-Hung; Ker, Ming-Dou; Wu, Chung-Yu
國立交通大學 2019-08-02T02:18:29Z Study and Verification on the Latch-Up Path Between I/O pMOS and N-Type Decoupling Capacitors in 0.18-mu m CMOS Technology Chen, Chun-Cheng; Ker, Ming-Dou
國立交通大學 2019-08-02T02:18:28Z ESD Protection Design With Diode-Triggered Quad-SCR for Separated Power Domains Chen, Jie-Ting; Ker, Ming-Dou
國立交通大學 2019-08-02T02:18:28Z Area-Efficient On-Chip Transient Detection Circuit for System-Level ESD Protection Against Transient-Induced Malfunction Chen, Wen-Chieh; Ker, Ming-Dou
國立交通大學 2019-08-02T02:15:29Z Avalanche Ruggedness Capability and Improvement of 5-V n-Channel Large-Array MOSFET in BCD Process Nidhi, Karuna; Ker, Ming-Dou; Lee, Jian-Hsing; Huang, Shao-Chang
國立交通大學 2019-08-02T02:14:47Z Investigation on Latch-Up Path between I/O PMOS and Core PMOS in a 0.18-mu m CMOS Process Chen, Chun-Cheng; Ker, Ming-Dou
國立交通大學 2019-05-02T00:25:58Z Optimization Design on Active Guard Ring to Improve Latch-Up Immunity of CMOS Integrated Circuits Chen, Chun-Cheng; Ker, Ming-Dou
國立交通大學 2019-04-02T06:04:53Z Analysis and Solution to Overcome EOS Failure Induced by Latchup Test in A High-Voltage Integrated Circuits Tsai, Hui-Wen; Ker, Ming-Dou; Liu, Yi-Sheng; Chuang, Ming-Nan
國立交通大學 2019-04-02T06:04:52Z Ultra-Low-Leakage Power-Rail ESD Clamp Circuit in a 65-nm CMOS Technology Altolaguirre, Federico A.; Ker, Ming-Dou
國立交通大學 2019-04-02T06:04:47Z Design of Multiple-Charge-Pump System for Implantable Biomedical Applications Lin, Shiau-Pin; Ker, Ming-Dou
國立交通大學 2019-04-02T06:04:44Z Design on LVDS receiver with new delay-selecting technique for UXGA flat panel display applications Ker, Ming-Dou; Wu, Chien-Hua

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