| 國立交通大學 |
2015-11-26T01:02:22Z |
100至200伏特SOI製程高壓積體電路之靜電放電防護設計
|
黃義傑; Huang, Yi-Jie; 柯明道; Ker, Ming-Dou |
| 國立交通大學 |
2015-11-26T01:02:22Z |
佈局最佳化的低壓元件堆疊來達成高壓積體電路之靜電放電防護設計
|
廖顯峰; Liao, Seian-Feng; 柯明道; Ker, Ming-Dou |
| 國立交通大學 |
2015-11-26T00:55:39Z |
提升積體電路栓鎖防疫能力之設計方法與實現
|
蔡惠雯; Tsai, Hui-Wen; 柯明道; Ker, Ming-Dou |
| 國立交通大學 |
2015-07-21T11:21:14Z |
Active Guard Ring to Improve Latch-Up Immunity
|
Tsai, Hui-Wen; Ker, Ming-Dou |
| 國立交通大學 |
2015-07-21T08:31:30Z |
A High-Voltage-Tolerant Stimulator Realized in the Low-Voltage CMOS Process for Cochlear Implant
|
Lin, Kuan-Yu; Ker, Ming-Dou; Lin, Chun-Yu |
| 國立交通大學 |
2015-07-21T08:31:29Z |
ESD Protection Design for Radio-Frequency Integrated Circuits in Nanoscale CMOS Technology
|
Lin, Chun-Yu; Chu, Li-Wei; Tsai, Shiang-Yu; Ker, Ming-Dou; Song, Ming-Hsiang; Jou, Chewn-Pu; Lu, Tse-Hua; Tseng, Jen-Chou; Tsai, Ming-Hsien; Hsu, Tsun-Lai; Hung, Ping-Fang; Wei, Yu-Lin; Chang, Tzu-Heng |
| 國立交通大學 |
2015-07-21T08:31:00Z |
DESIGN OF 2xV(DD) LOGIC GATES WITH ONLY 1xV(DD) DEVICES IN NANOSCALE CMOS TECHNOLOGY
|
Chiu, Po-Yen; Ker, Ming-Dou |
| 國立交通大學 |
2015-07-21T08:30:57Z |
Power-Rail ESD Clamp Circuit with Embedded-Trigger SCR Device in a 65-nm CMOS Process
|
Altolaguirre, Federico A.; Ker, Ming-Dou |
| 國立交通大學 |
2015-05-12T02:59:35Z |
Self-reset transient-to-digital convertor and electronic product utilizing the same
|
Ker Ming-Dou; Yen Cheng-Cheng; Chen Tung-Yang; Tsai Ching-Ling; Chen Shih-Fan |
| 國立交通大學 |
2014-12-16T06:16:17Z |
Charge pump circuit suitable for low-voltage process
|
Ker, Ming-Dou; Tsai, Chia-Sheng |
| 國立交通大學 |
2014-12-16T06:16:17Z |
[DOUBLE-TRIGGERED SILICON CONTROLLING RECTIFIER AND ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT THEREOF]
|
Ker, Ming-Dou; Hsu, Kuo-Chun |
| 國立交通大學 |
2014-12-16T06:16:14Z |
Silicon controlled rectifier for the electrostatic discharge protection
|
Ker, Ming-Dou; Lin, Kun-Hsien |
| 國立交通大學 |
2014-12-16T06:16:03Z |
HIGH-VOLTAGE TOLERANT POWER-RAIL ESD CLAMP CIRCUIT
|
Ker, Ming-Dou; Chen, Wen-Yi |
| 國立交通大學 |
2014-12-16T06:16:01Z |
Mixed voltage input/output buffer having low-voltage design
|
Ker, Ming-Dou; Chen, Shih-Lun |
| 國立交通大學 |
2014-12-16T06:15:57Z |
MIXED-VOLTAGE INPUT/OUTPUT BUFFER
|
Ker, Ming-Dou; Hu, Fang-Ling |
| 國立交通大學 |
2014-12-16T06:15:50Z |
POWER-RAIL ESD PROTECTION CIRCUIT WITHOUT LOCK-ON FAILURE
|
Ker, Ming-Dou; Yen, Cheng-Cheng; Chen, Tung-Yang |
| 國立交通大學 |
2014-12-16T06:15:47Z |
TRANSIENT DETECTION CIRCUIT FOR ESD PROTECTION
|
Ker, Ming-Dou; Yen, Cheng-Cheng; Liao, Chi-Sheng; Chen, Tung-Yang |
| 國立交通大學 |
2014-12-16T06:15:47Z |
SILICON CONTROLLED RECTIFIER
|
Ker, Ming-Dou; Lin, Chun-Yu; Wang, Chang-Tzu |
| 國立交通大學 |
2014-12-16T06:15:46Z |
TRANSIENT TO DIGITAL CONVERTERS
|
Ker, Ming-Dou; Yen, Cheng-Cheng; Liao, Chi-Sheng; Chen, Tung-Yang |
| 國立交通大學 |
2014-12-16T06:15:45Z |
TRANSIENT DETECTION CIRCUIT
|
Ker, Ming-Dou; Yen, Cheng-Cheng; Liao, Chi-Sheng; Chen, Tung-Yang |
| 國立交通大學 |
2014-12-16T06:15:37Z |
ESD PROTECTION CIRCUITRY WITH MULTI-FINGER SCRS
|
Ker, Ming-Dou; Lin, Chun-Yu; Wang, Chang-Tzu |
| 國立交通大學 |
2014-12-16T06:15:35Z |
ELECTROSTATIC DISCHARGE PROTECTION DEVICE AND RELATED CIRCUIT
|
Ker, Ming-Dou; Hsiao, Yuan-Wen; Wang, Chang-Tzu |
| 國立交通大學 |
2014-12-16T06:15:23Z |
ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT
|
Ker Ming-Dou; Lin Chun-Yu; Wang Chang-Tzu |
| 國立交通大學 |
2014-12-16T06:15:12Z |
ELECTROSTATIC DISCHARGE PROTECTION DEVICE
|
HUANG Yeh-Jen; Jou Yeh-Ning; Ker Ming-Dou; Chen Wen-Yi; Hung Chia-Wei; Chiou Hwa-Chyi |
| 國立交通大學 |
2014-12-16T06:15:06Z |
On-Chip Noise Filter Circuit
|
Ker Ming-Dou; Yen Cheng-Cheng; Chen Tung-Yang |
