| 國立交通大學 |
2014-12-08T15:24:44Z |
Low-power wordline voltage generator for low-voltage flash memory
|
Wang, Tzu-Ming; Ker, Ming-Dou; Yeh, Steve; Chang, Ya-Chun |
| 國立交通大學 |
2014-12-08T15:24:43Z |
On-chip transient detection circuit for system-level ESD protection in CMOS ICs
|
Ker, Ming-Dou; Yen, Cheng-Cheng; Shih, Pi-Chia |
| 國立交通大學 |
2014-12-08T15:24:42Z |
Circuit Solutions on ESD Protection Design for Mixed-Voltage I/O Buffers in Nanoscale CMOS
|
Ker, Ming-Dou; Wang, Chang-Tzu |
| 國立交通大學 |
2014-12-08T15:24:40Z |
Design of 2xVDD-Tolerant I/O Buffer with 1xVDD CMOS Devices
|
Ker, Ming-Dou; Lin, Yan-Liang |
| 國立交通大學 |
2014-12-08T15:24:17Z |
Design of Compact ESD Protection Circuit for V-Band RF Applications in a 65-nm CMOS Technology
|
Lin, Chun-Yu; Chu, Li-Wei; Tsai, Shiang-Yu; Ker, Ming-Dou |
| 國立交通大學 |
2014-12-08T15:24:11Z |
Power-Rail ESD Clamp Circuit With Ultralow Standby Leakage Current and High Area Efficiency in Nanometer CMOS Technology
|
Yeh, Chih-Ting; Ker, Ming-Dou |
| 國立交通大學 |
2014-12-08T15:23:38Z |
Characterization of SOA in Time Domain and the Improvement Techniques for Using in High-Voltage Integrated Circuits
|
Chen, Wen-Yi; Ker, Ming-Dou |
| 國立交通大學 |
2014-12-08T15:23:37Z |
Study of intrinsic characteristics of ESD protection diodes for high-speed I/O applications
|
Yeh, Chih-Ting; Ker, Ming-Dou |
| 國立交通大學 |
2014-12-08T15:23:36Z |
Improvement on ESD Robustness of Lateral DMOS in High-Voltage CMOS ICs by Body Current Injection
|
Chen, Wen-Yi; Ker, Ming-Dou; Jou, Yeh-Ning; Huang, Yeh-Jen; Lin, Geeng-Lih |
| 國立交通大學 |
2014-12-08T15:23:05Z |
ESD-Aware Circuit Design in CMOS Integrated Circuits to Meet System-Level ESD Specification in Microelectronic Systems
|
Ker, Ming-Dou |
| 國立交通大學 |
2014-12-08T15:22:57Z |
Transient-to-Digital Converter for Protection Design in CMOS Integrated Circuits against Electrical Fast Transient
|
Yen, Cheng-Cheng; Ker, Ming-Dou; Liao, Chi-Sheng; Chen, Tung-Yang; Tsai, Chih-Chung |
| 國立交通大學 |
2014-12-08T15:22:52Z |
ESD Protection Design for 60-GHz LNA With Inductor-Triggered SCR in 65-nm CMOS Process
|
Lin, Chun-Yu; Chu, Li-Wei; Ker, Ming-Dou |
| 國立交通大學 |
2014-12-08T15:22:31Z |
On-chip detection circuit for protection design in display panel against electrical fast transient (EFT) disturbance
|
Yen, Cheng-Cheng; Ker, Ming-Dou; Lin, Wan-Yen; Yang, Che-Ming; Chen, Shih-Fan; Chen, Tung-Yang |
| 國立交通大學 |
2014-12-08T15:22:20Z |
New Design of 2 x VDD-Tolerant Power-Rail ESD Clamp Circuit for Mixed-Voltage I/O Buffers in 65-nm CMOS Technology
|
Yeh, Chih-Ting; Ker, Ming-Dou |
| 國立交通大學 |
2014-12-08T15:21:52Z |
Diode-Triggered Silicon-Controlled Rectifier With Reduced Voltage Overshoot for CDM ESD Protection
|
Chen, Wen-Yi; Rosenbaum, Elyse; Ker, Ming-Dou |
| 國立交通大學 |
2014-12-08T15:21:45Z |
Design and Implementation of Capacitive Sensor Readout Circuit on Glass Substrate for Touch Panel Applications
|
Wang, Tzu-Ming; Ker, Ming-Dou |
| 國立交通大學 |
2014-12-08T15:21:45Z |
Layout Styles to Improve CDM ESD Robustness of Integrated Circuits in 65-nm CMOS Process
|
Ker, Ming-Dou; Lin, Chun-Yu; Chang, Tang-Long |
| 國立交通大學 |
2014-12-08T15:20:59Z |
Stimulus driver for epilepsy seizure suppression with adaptive loading impedance
|
Ker, Ming-Dou; Lin, Chun-Yu; Chen, Wei-Ling |
| 國立交通大學 |
2014-12-08T15:20:53Z |
New 4-Bit Transient-to-Digital Converter for System-Level ESD Protection in Display Panels
|
Ker, Ming-Dou; Yen, Cheng-Cheng |
| 國立交通大學 |
2014-12-08T15:20:33Z |
Design of Integrated Gate Driver With Threshold Voltage Drop Cancellation in Amorphous Silicon Technology for TFT-LCD Application
|
Chu, Li-Wei; Liu, Po-Tsun; Ker, Ming-Dou |
| 國立交通大學 |
2014-12-08T15:20:29Z |
Impact of Shielding Line on CDM ESD Robustness of Core Circuits in a 65-nm CMOS Process
|
Ker, Ming-Dou; Lin, Chun-Yu; Chang, Tang-Long |
| 國立交通大學 |
2014-12-08T15:16:38Z |
Design on mixed-voltage I/O buffers with consideration of hot-carrier reliability
|
Ker, Ming-Dou; Hu, Fang-Ling |
| 國立交通大學 |
2014-12-08T15:16:31Z |
On-Panel Output Buffer With Offset Compensation Technique for Data Driver in LTPS Technology
|
Ker, Ming-Dou; Deng, Chih-Kang; Huang, Ju-Lin |
| 國立交通大學 |
2014-12-08T15:16:06Z |
New curvature-compensation technique for CMOS bandgap reference with sub-1-V operation
|
Ker, Ming-Dou; Chen, Jung-Sheng |
| 國立交通大學 |
2014-12-08T15:15:50Z |
Component-level measurement for transient-induced latch-up in CMOS ICs under system-level ESD considerations
|
Ker, Ming-Dou; Hsu, Sheng-Fu |
