| 國立交通大學 |
2014-12-08T15:11:16Z |
Investigation on the validity of holding voltage in high-voltage devices measured by transmission-line-pulsing (TLP)
|
Chen, Wen-Yi; Ker, Ming-Dou; Huang, Yeh-Jen |
| 國立交通大學 |
2014-12-08T15:11:04Z |
Low-capacitance and fast turn-on SCR for RF ESD protection
|
Lin, Chun-Yu; Ker, Ming-Dou; Meng, Guo-Xuan |
| 國立交通大學 |
2014-12-08T15:10:49Z |
Temperature Coefficient of Poly-Silicon TFT and Its Application on Voltage Reference Circuit With Temperature Compensation in LTPS Process
|
Lu, Ting-Chou; Zan, Hsiao-Wen; Ker, Ming-Dou |
| 國立交通大學 |
2014-12-08T15:10:44Z |
Investigation on Robustness of CMOS Devices Against Cable Discharge Event (CDE) Under Different Layout Parameters in a Deep-Submicrometer CMOS Technology
|
Ker, Ming-Dou; Lai, Tai-Hsiang |
| 國立交通大學 |
2014-12-08T15:10:36Z |
Investigation on Board-Level CDM ESD Issue in IC Products
|
Ker, Ming-Dou; Hsiao, Yuan-Wen |
| 國立交通大學 |
2014-12-08T15:10:12Z |
ESD protection design for giga-Hz high-speed I/O interfaces in a 130-nm CMOS process
|
Hsiao, Yuan-Wen; Ker, Ming-Dou; Chiu, Po-Yen; Huang, Chun; Tseng, Yuh-Kuang |
| 國立交通大學 |
2014-12-08T15:09:54Z |
Low-capacitance SCR with waffle layout structure for on-chip ESD protection in RF ICs
|
Lin, Chun-Yu; Ker, Ming-Dou |
| 國立交通大學 |
2014-12-08T15:09:50Z |
Design of Power-Rail ESD Clamp Circuit With Ultra-Low Standby Leakage Current in Nanoscale CMOS Technology
|
Wang, Chang-Tzu; Ker, Ming-Dou |
| 國立交通大學 |
2014-12-08T15:09:48Z |
Impedance-Isolation Technique for ESD Protection Design in RF Integrated Circuits
|
Ker, Ming-Dou; Hsiao, Yuan-Wen |
| 國立交通大學 |
2014-12-08T15:09:48Z |
Design of High-Voltage-Tolerant ESD Protection Circuit in Low-Voltage CMOS Processes
|
Ker, Ming-Dou; Wang, Chang-Tzu |
| 國立交通大學 |
2014-12-08T15:09:48Z |
Board-Level ESD of Driver ICs on LCD Panel
|
Tseng, Jen-Chou; Hsu, Chung-Ti; Tsai, Chia-Ku; Chen, Shu-Chuan; Ker, Ming-Dou |
| 國立交通大學 |
2014-12-08T15:09:42Z |
High-Voltage nLDMOS in Waffle-Layout Style With Body-Injected Technique for ESD Protection
|
Chen, Wen-Yi; Ker, Ming-Dou |
| 國立交通大學 |
2014-12-08T15:09:34Z |
Area-Efficient ESD-Transient Detection Circuit With Smaller Capacitance for On-Chip Power-Rail ESD Protection in CMOS ICs
|
Chen, Shih-Hung; Ker, Ming-Dou |
| 國立交通大學 |
2014-12-08T15:09:31Z |
A 5-GHz Differential Low-Noise Amplifier With High Pin-to-Pin ESD Robustness in a 130-nm CMOS Process
|
Hsiao, Yuan-Wen; Ker, Ming-Dou |
| 國立交通大學 |
2014-12-08T15:09:27Z |
Design of mixed-voltage crystal oscillator circuit in low-voltage CMOS technology
|
Ker, Ming-Dou; Liao, Hung-Tai |
| 國立交通大學 |
2014-12-08T15:09:26Z |
Impact of gate tunneling leakage on performances of phase locked loop circuit in nanoscale CMOS technology
|
Chen, Jung-Sheng; Ker, Ming-Dou |
| 國立交通大學 |
2014-12-08T15:09:25Z |
Transient-Induced Latchup in CMOS ICs Under Electrical Fast-Transient Test
|
Yen, Cheng-Cheng; Ker, Ming-Dou; Chen, Tung-Yang |
| 國立交通大學 |
2014-12-08T15:09:25Z |
The Effect of IEC-Like Fast Transients on RC-Triggered ESD Power Clamps
|
Yen, Cheng-Cheng; Ker, Ming-Dou |
| 國立交通大學 |
2014-12-08T15:09:22Z |
Low-capacitance ESD protection design for high-speed I/O interfaces in a 130-nm CMOS process
|
Hsiao, Yuan-Wen; Ker, Ming-Dou |
| 國立交通大學 |
2014-12-08T15:09:20Z |
Test structure on SCR device in waffle layout for RE ESD protection
|
Ker, Ming-Dou; Lin, Chun-Yu |
| 國立交通大學 |
2014-12-08T15:09:16Z |
Optimization on MOS-Triggered SCR Structures for On-Chip ESD Protection
|
Chen, Shih-Hung; Ker, Ming-Dou |
| 國立交通大學 |
2014-12-08T15:09:04Z |
Impact of Gate Leakage on Performances of Phase-Locked Loop Circuit in Nanoscale CMOS Technology
|
Chen, Jung-Sheng; Ker, Ming-Dou |
| 國立交通大學 |
2014-12-08T15:09:04Z |
Transient-to-Digital Converter for System-Level Electrostatic Discharge Protection in CMOS ICs
|
Ker, Ming-Dou; Yen, Cheng-Cheng |
| 國立交通大學 |
2014-12-08T15:08:52Z |
Design of Analog Output Buffer With Level Shifting Function on Glass Substrate for Panel Application
|
Wang, Tzu-Ming; Ker, Ming-Dou; Chen, Sao-Chi |
| 國立交通大學 |
2014-12-08T15:08:40Z |
Digital-to-analog converter with gamma correction on glass substrate for TFT-panel applications
|
Wang, Tzu-Ming; Li, Yu-Hsuan; Ker, Ming-Dou |
