| 國立交通大學 |
2018-08-21T05:53:54Z |
Regulated Charge Pump With New Clocking Scheme for Smoothing the Charging Current in Low Voltage CMOS Process
|
Luo, Zhicong; Ker, Ming-Dou; Cheng, Wan-Hsueh; Yen, Ting-Yang |
| 國立交通大學 |
2018-08-21T05:53:47Z |
Improving Safe-Operating-Area o f a 5-V n-Channel Large Array MOSFET in a 0.15-mu m BCD Process
|
Nidhi, Karuna; Ker, Ming-Dou; Lin, Tingyou; Lee, Jian-Hsing |
| 國立交通大學 |
2018-08-21T05:53:46Z |
A High-Voltage-Tolerant and Power-Efficient Stimulator With Adaptive Power Supply Realized in Low-Voltage CMOS Process for Implantable Biomedical Applications
|
Luo, Zhicong; Ker, Ming-Dou |
| 國立交通大學 |
2018-08-21T05:53:25Z |
Self-Reset Transient Detection Circuit for On-Chip Protection Against System-Level Electrical-Transient Disturbance
|
Kang, Xiao-Rui; Ker, Ming-Dou |
| 國立交通大學 |
2018-08-21T05:53:21Z |
Design of Power-Rail ESD Clamp With Dynamic Timing-Voltage Detection Against False Trigger During Fast Power-ON Events
|
Chen, Jie-Ting; Ker, Ming-Dou |
| 國立交通大學 |
2018-08-21T05:53:13Z |
Comparison Between High-Holding-Voltage SCR and Stacked Low-Voltage Devices for ESD Protection in High-Voltage Applications
|
Dai, Chia-Tsen; Ker, Ming-Dou |
| 國立交通大學 |
2018-08-21T05:53:09Z |
A Digitally Dynamic Power Supply Technique for 16-Channel 12 V-Tolerant Stimulator Realized in a 0.18-mu m 1.8-V/3.3-V Low-Voltage CMOS Process
|
Luo, Zhicong; Ker, Ming-Dou; Yang, Tzu-Yi; Cheng, Wan-Hsueh |
| 國立交通大學 |
2018-08-21T05:52:53Z |
Design of 2.4-GHz T/R switch with embedded ESD protection devices in CMOS process
|
Lin, Chun-Yu; Liu, Rui-Hong; Ker, Ming-Dou |
| 國立交通大學 |
2018-08-21T05:52:49Z |
On-Chip ESD Protection Device for High-Speed I/O Applications in CMOS Technology
|
Chen, Jie-Ting; Lin, Chun-Yu; Ker, Ming-Dou |
| 國立交通大學 |
2018-01-24T07:43:23Z |
奈米積體電路CMOS製程之先進靜電放電防護設計
|
艾飛; 柯明道; Federico Agustin Altolaguirre; Ker, Ming-Dou |
| 國立交通大學 |
2018-01-24T07:42:22Z |
實現於低壓製程中具有級數切換功能之高壓產生器
|
游力瑾; 柯明道; Yu, Li-Chin; Ker, Ming-Dou |
| 國立交通大學 |
2018-01-24T07:42:16Z |
應用於900–1800MHz GSM規格的高功率CMOS T/R開關之靜電放電防護設計
|
洪道一; 柯明道; Hung, Tao-Yi; Ker, Ming-Dou |
| 國立交通大學 |
2018-01-24T07:39:58Z |
具製程電壓溫度補償之非晶體震盪器電路設計與實現
|
陸亭州; 柯明道; 冉曉雯; Lu, Ting-Chou; Ker, Ming-Dou; Zan, Hsiao-Wan |
| 國立交通大學 |
2018-01-24T07:39:40Z |
具自我重置功能之系統層級靜電放電暫態偵測電路
|
康宵瑞; 柯明道; Kang, Xiao-Rui; Ker, Ming-Dou |
| 國立交通大學 |
2018-01-24T07:39:40Z |
生醫應用之具有電荷平衡和節能特性的高壓共容刺激器電路設計與實現
|
羅志聰; 柯明道; Luo, Zhicong; Ker, Ming-Dou |
| 國立交通大學 |
2018-01-24T07:38:40Z |
應用於抑制癲癇發作之雙模式刺激器系統設計
|
顏鼎洋; 柯明道; Yen, Ting-Yang; Ker, Ming-Dou |
| 國立交通大學 |
2018-01-24T07:38:35Z |
低電壓觸發矽控整流器在靜電放電防護上的設計與應用
|
吳易翰; 柯明道; Wu, Yi-Han; Ker, Ming-Dou |
| 國立交通大學 |
2017-04-21T06:56:42Z |
A High-Voltage-Tolerant and Precise Charge-Balanced Neuro-Stimulator in Low Voltage CMOS Process
|
Luo, Zhicong; Ker, Ming-Dou |
| 國立交通大學 |
2017-04-21T06:56:36Z |
ESD Protection Design for Touch Panel Control IC Against Latchup-Like Failure Induced by System-Level ESD Test
|
Ker, Ming-Dou; Chiu, Po-Yen; Shieh, Wuu-Trong; Wang, Chun-Chi |
| 國立交通大學 |
2017-04-21T06:56:35Z |
Optimization of Guard Ring Structures to Improve Latchup Immunity in an 18 V DDDMOS Process
|
Dai, Chia-Tsen; Ker, Ming-Dou |
| 國立交通大學 |
2017-04-21T06:56:27Z |
Low-Leakage Bidirectional SCR With Symmetrical Trigger Circuit for ESD Protection in 40-nm CMOS Process
|
Altolaguirre, Federico A.; Ker, Ming-Dou |
| 國立交通大學 |
2017-04-21T06:56:16Z |
A 8 Phases 192 MHz Crystal-Less Clock Generator with PVT Calibration
|
Lu, Ting-Chou; Ker, Ming-Dou; Zan, Hsiao-Wen; Liu, Jen-Chieh; Lee, Yu |
| 國立交通大學 |
2017-04-21T06:56:09Z |
A 8 Phases 192 MHz Crystal-Less Clock Generator with PVT Calibration
|
Lu, Ting-Chou; Ker, Ming-Dou; Zan, Hsiao-Wen; Liu, Jen-Chieh; Lee, Yu |
| 國立交通大學 |
2017-04-21T06:55:58Z |
Low-Leakage and Low-Trigger-Voltage SCR Device for ESD Protection in 28-nm High-k Metal Gate CMOS Process
|
Lin, Chun-Yu; Wu, Yi-Han; Ker, Ming-Dou |
| 國立交通大學 |
2017-04-21T06:55:39Z |
Quad-SCR Device for Cross-Domain ESD Protection
|
Altolaguirre, Federico A.; Ker, Ming-Dou |
