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Institution Date Title Author
國立交通大學 2018-08-21T05:53:29Z 3-D Stacked Technology of DRAM-Logic Controller Using Through-Silicon Via (TSV) Shen, Wen-Wei; Lin, Yu-Min; Chen, Shang-Chun; Chang, Hsiang-Hung; Chang, Tao-Chih; Lo, Wei-Chung; Lin, Chien-Chung; Chou, Yung-Fa; Kwai, Ding-Ming; Kao, Ming-Jer; Chen, Kuan-Neng
國立交通大學 2018-08-21T05:56:48Z Heterogeneous Chip Power Delivery Modeling and Co-Synthesis for Practical 3DIC Realization Liao, Wei-Hsun; Lin, Chang-Tzu; Fang, Sheng-Hsin; Huang, Chien-Chia; Chen, Hung-Ming; Kwai, Ding-Ming; Chou, Yung-Fa
國立交通大學 2018-08-21T05:56:36Z I-LUTSim: An Iterative Look-Up Table Based Thermal Simulator for 3-D ICs Pan, Chi-Wen; Lee, Yu-Min; Huang, Pei-Yu; Yang, Chi-Ping; Lin, Chang-Tzu; Lee, Chia-Hsin; Chou, Yung-Fa; Kwai, Ding-Ming
國立交通大學 2016-03-28T00:05:45Z Improving Power Delivery Network Design by Practical Methodologies Huang, Chia-Chi; Lin, Chang-Tzu; Liao, Wei-Syun; Lee, Chieh-Jui; Chen, Hung-Ming; Lee, Chia-Hsin; Kwai, Ding-Ming
國立臺灣大學 2003 Practical Considerations in Applying-Modulation-Based Analog BIST to Sampled-Data Systems Hong, Hao-Chiao; Huang, Jiun-Lang; Cheng, Kwang-Ting; Wu, Cheng-Wen; Kwai, Ding-Ming
國立成功大學 2013-09 Reactivation of Spares for Off-Chip Memory Repair After Die Stacking in a 3-D IC With TSVs Chou, Yung-Fa; Kwai, Ding-Ming; Shieh, Ming-Der; Wu, Cheng-Wen
國立交通大學 2017-04-21T06:49:39Z SRAM cell current in low leakage design Kwai, Ding-Ming; Hsiao, Ching-Hua; Kuo, Chung-Ping; Chuang, Chi-Hsien; Hsu, Min-Chung; Chen, Yi-Chun; Sung, Yu-Ling; Pan, Hsien-Yu; Lee, Chia-Hsin; Chang, Meng-Fan; Chou, Yung-Fa

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