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Institution Date Title Author
臺大學術典藏 2018-09-10T15:00:41Z A 6-Gb/s Adaptive-Loop-Bandwidth Clock and Data Recovery (CDR) Circuits L-H Chiueh;T-C Lee; L-H Chiueh; T-C Lee; TAI-CHENG LEE
臺大學術典藏 2018-09-10T15:00:41Z A 6-Gb/s Adaptive-Loop-Bandwidth Clock and Data Recovery (CDR) Circuits L-H Chiueh;T-C Lee; L-H Chiueh; T-C Lee; TAI-CHENG LEE

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