臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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Showing items 11-20 of 63 (7 Page(s) Totally)
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Institution	Date	Title	Author
臺大學術典藏	2018-09-10T09:25:30Z	A 34.8%-PAE CMOS Transmitter Frontend for 24-GHz FMCW Radar Applications	H.-S. Chen;L.-H. Lu; H.-S. Chen; L.-H. Lu; LIANG-HUNG LU
臺大學術典藏	2018-09-10T09:25:29Z	An open-loop half-quadrature hybrid for multiphase signals generation	H.-S. Chen;L.-H. Lu; H.-S. Chen; L.-H. Lu; LIANG-HUNG LU
臺大學術典藏	2018-09-10T09:25:29Z	60-GHz four-element phased-array transmit/receive system-in-package using phase compensation techniques in 65-nm flip-chip CMOS process	Y.-F. Lu; T.-Y. Huang; Y.-L. Chang; Y.-K. Hsieh; P.-J. Peng; I.-C. Chang; T.-C. Tsai; K.-Y. Kao; W.-Y. Hsiung; J. Wang; Y. A. Hsu; K.-Y. Lin; H.-C. Lu; Y.-C. Lin; L.-H. Lu; T.-W. Huang; R.-B. Wu; H. Wang; J.-L. Kuo; LIANG-HUNG LU et al.
臺大學術典藏	2018-09-10T09:24:41Z	60GHz four-element phased-array transmit/receive system-in-package using phase compensation techniques in 65nm flip-chip CMOS process	Y.-F. Lu; T.-Y. Huang; Y.-L. Chang; Y.-K. Hsieh; P.-J. Peng; I¡VC. Chang; T.-C. Tsai; K.-Y. Kao; N. Hsiung; J. Wang; Y. A. Hsu; K.-Y. Lin; H.-C. Lu; Y.-C. Lin; L.-H. Lu; T.-W. Huang; R.-B. Wu,; H. Wang; J.-L. Kuo; RUEY-BEEI WU et al.
臺大學術典藏	2018-09-10T08:47:22Z	A V-Band divide-by-four direct injection-locked frequency divider in 0.18-um CMOS	H.-H. Hsieh; H.-S. Chen; L.-H. Lu; LIANG-HUNG LU
臺大學術典藏	2018-09-10T08:19:08Z	A low-power quadrature VCO and its application to a 0.6-V 2.4-GHz PLL	C.-T. Lu;H.-H. Hsieh;L.-H. Lu; C.-T. Lu; H.-H. Hsieh; L.-H. Lu; LIANG-HUNG LU
臺大學術典藏	2018-09-10T08:19:08Z	A 0.6-V delta-sigma ADC with 57-dB dynamic range	C.-H. Wei;L.-H. Lu; C.-H. Wei; L.-H. Lu; LIANG-HUNG LU
臺大學術典藏	2018-09-10T07:43:05Z	A 40-GHz low-noise amplifier with a positive-feedback network in 0.18-μm CMOS	H.-H. Hsieh;L.-H. Lu; H.-H. Hsieh; L.-H. Lu; LIANG-HUNG LU
臺大學術典藏	2018-09-10T07:43:05Z	A 10 GHz phase-locked loop with a compact low-pass filter in 0.18 μm CMOS	S.-J. Li;H.-H. Hsieh;L.-H. Lu; S.-J. Li; H.-H. Hsieh; L.-H. Lu; LIANG-HUNG LU
臺大學術典藏	2018-09-10T07:43:05Z	A 0.6 V low-power wide-range delay-locked loop in 0.18 µm CMOS	C.-T. Lu;H.-H. Hsieh;L.-H. Lu; C.-T. Lu; H.-H. Hsieh; L.-H. Lu; LIANG-HUNG LU

Showing items 11-20 of 63 (7 Page(s) Totally)
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