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Showing items 1-3 of 3 (1 Page(s) Totally) 1 View [10|25|50] records per page
國立交通大學 |
2015-12-02T02:59:21Z |
Power-Efficient Instancy Aware DRAM Scheduling
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Pan, Gung-Yu; Lai, Chih-Yen; Jou, Jing-Yang; Lai, Bo-Cheng Charles |
國立交通大學 |
2015-07-21T08:30:53Z |
A Read-Write Aware DRAM Scheduling for Power Reduction in Multi-Core Systems
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Lai, Chih-Yen; Pan, Gung-Yu; Kuo, Hsien-Kai; Jou, Jing-Yang |
國立交通大學 |
2014-12-12T02:35:51Z |
在多核心系統中考慮動態隨機存取記憶體讀/寫特性以降低功率消耗之排程機制
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賴之彥; Lai, Chih-Yen; 周景揚; Jou, Jing-Yang |
Showing items 1-3 of 3 (1 Page(s) Totally) 1 View [10|25|50] records per page
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