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Showing items 1-8 of 8  (1 Page(s) Totally)
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Institution Date Title Author
國立臺灣大學 2007 應用於通訊積體電路之新式前端數位訊號處理演算法與VLSI架構 賴致廷; Lai, Jyh-Ting
國立臺灣大學 2007 Joint AGC-Equalization (Joint AGC-EQ) Algorithm and VLSI Architecture For Wirelined Transceiver Designs Lai, Jyh-Ting; Wu, An-Yeu; Lee, Chien-Hsiung
國立臺灣大學 2007 A Systematic Design Approach to the Band-Tracking Packet Detector in OFDM-Based Ultrawideband Systems Lai, Jyh-Ting; Wu, An-Yeu; Chen, Wen-Chiang
國立臺灣大學 2004-05 1000BASE-T Gigabit Ethernet baseband DSP IC design Lin, Hsiu-Ping; Chen, Nancy F.; Lai, Jyh-Ting; Wu, An-Yeu
臺大學術典藏 2004-05 1000BASE-T Gigabit Ethernet baseband DSP IC design Lin, Hsiu-Ping; Chen, Nancy F.; Lai, Jyh-Ting; Wu, An-Yeu; Lin, Hsiu-Ping; Chen, Nancy F.; Lai, Jyh-Ting; Wu, An-Yeu
國立臺灣大學 2004 Fast Convergent Pipelined Adaptive DFE Architecture Using Post-Cursor Processing Filter Technique Yang, Meng-Da; Wu, An-Yeu; Lai, Jyh-Ting
國立臺灣大學 2004 High-performance VLSI architecture of adaptive decision feedback equalizer based on predictive parallel branch slicer (PPBS) scheme Yang, Meng-Da; Wu, An-Yeu; Lai, Jyh-Ting
國立臺灣大學 2003-08 A novel multipath matrix algorithm for exact room response identification in stereo echo cancellation Lai, Jyh-Ting; Wu, An-Yeu; Yeh, Cheng-Chung

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