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Taiwan Academic Institutional Repository >
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"lee chao cheng"
Showing items 26-35 of 39 (4 Page(s) Totally)
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| 國立交通大學 |
2015-07-21T08:31:24Z |
90% Peak Efficiency Single-Inductor-Multiple-Output DC-DC Buck Converter with Output Independent Gate Drive Control
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Su, Yi-Ping; Lin, Chiun-He; Peng, Shen-Yu; Huang, Ru-Yu; Yang, Te-Fu; Chen, Shin-Hao; Lo, Ting-Jung; Chen, Ke-Horng; Wey, Chin-Long; Lin, Ying-Hsi; Lee, Chao-Cheng; Lin, Jian-Ru; Tsai, Tsung-Yen |
| 國立交通大學 |
2015-07-21T08:31:16Z |
A Low THD Clock-Free Class-D Audio Amplifier with an Increased Damping Resistor and Cross Offset Cancellation Technique
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Chou, Ying-Wei; Chien, Meng-Wei; Chen, Shin-Chieh; Chen, Ke-Horng; Lin, Ying-Hsi; Tsai, Tsung-Yen; Huang, Chen-Chih; Lee, Chao-Cheng; Tai, Zhih Han; Cheng, Yi Hsuan; Tsai, Chi Chung; Luo, Hsin-Yu; Wang, Shih-Ming; Chen, Long-Der; Yang, Cheng-Chen; Hui, Huang Tian |
| 國立交通大學 |
2015-07-21T08:31:15Z |
A Dual-Level Dual-Phase Pulse-Width Modulation Class-D Amplifier with 0.001% THD, 112 dB SNR
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Yang, Shang-Hsien; Yang, Yuan-Han; Chen, Ke-Horng; Hung, Chung-Chih; Wey, Chin-Long; Lin, Ying-Hsi; Tsai, Tsung-Yen; Huang, Chen-Chih; Lee, Chao-Cheng; Tai, Zhih Han; Cheng, Yi Hsuan; Tsai, Chi Chung; Luo, Hsin-Yu; Wang, Shih-Ming; Chen, Long-Der; Yang, Cheng-Chen; Hui, Huang Tian |
| 國立交通大學 |
2015-07-21T08:31:06Z |
A 10Gbps, 1.24pJ/bit, Burst-Mode Clock and Data Recovery with Jitter Suppression
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Su, Ming-Chiuan; Chen, Wei-Zen; Wu, Pei-Si; Chen, Yu-Hsian; Lee, Chao-Cheng; Jou, Shyh-Jye |
| 國立交通大學 |
2015-07-21T08:29:42Z |
120% Harvesting Energy Improvement by Maximum Power Extracting Control for High Sustainability Magnetic Power Monitoring and Harvesting System
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Huang, Tzu-Chi; Du, Ming-Jhe; Kang, Yu-Chai; Peng, Ruei-Hong; Chen, Ke-Horng; Lin, Ying-Hsi; Tsai, Tsung-Yen; Lee, Chao-Cheng; Chen, Long-Der; Chen, Jui-Lung |
| 國立交通大學 |
2015-07-21T08:28:41Z |
A 10-Gb/s, 1.24 pJ/bit, Burst-Mode Clock and Data Recovery With Jitter Suppression
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Su, Ming-Chiuan; Chen, Wei-Zen; Wu, Pei-Si; Chen, Yu-Hsiang; Lee, Chao-Cheng; Jou, Shyh-Jye |
| 國立交通大學 |
2014-12-08T15:34:51Z |
Dynamic Bootstrap Voltage Technique for High Efficiency Buck Converter in Universal Serial Bus Power Device Supplying System
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Chen, Wei-Chung; Chen, Ke-Horng; Wey, Chin-Long; Lin, Ying-Hsi; Tsai, Tsung-Yen; Huang, Chen-Chih; Lee, Chao-Cheng |
| 國立交通大學 |
2014-12-08T15:32:53Z |
Instruction-Cycle-Based Dynamic Voltage Scaling Power Management for Low-Power Digital Signal Processor With 53% Power Savings
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Peng, Shen-Yu; Huang, Tzu-Chi; Lee, Yu-Huei; Chiu, Chao-Chang; Chen, Ke-Horng; Lin, Ying-Hsi; Lee, Chao-Cheng; Tsai, Tsung-Yen; Huang, Chen-Chih; Chen, Long-Der; Yang, Cheng-Chen |
| 國立交通大學 |
2014-12-08T15:30:02Z |
A Low Quiescent Current Asynchronous Digital-LDO With PLL-Modulated Fast-DVS Power Management in 40 nm SoC for MIPS Performance Improvement
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Lee, Yu-Huei; Peng, Shen-Yu; Chiu, Chao-Chang; Wu, Alex Chun-Hsien; Chen, Ke-Horng; Lin, Ying-Hsi; Wang, Shih-Wei; Tsai, Tsung-Yen; Huang, Chen-Chih; Lee, Chao-Cheng |
| 國立交通大學 |
2014-12-08T15:28:33Z |
A Near-Optimum Dynamic Voltage Scaling (DVS) in 65-nm Energy-Efficient Power Management With Frequency-Based Control (FBC) for SoC System
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Lee, Yu-Huei; Chiu, Chao-Chang; Peng, Shen-Yu; Chen, Ke-Horng; Lin, Ying-Hsi; Lee, Chao-Cheng; Huang, Chen-Chih; Tsai, Tsung-Yen |
Showing items 26-35 of 39 (4 Page(s) Totally)
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