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Showing items 11-23 of 23 (1 Page(s) Totally) 1 View [10|25|50] records per page
國立臺灣大學 |
2008 |
A 20-Gb/s Burst-Mode Clock and Data Recovery Circuit Using Injection-Locking Technique
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Lee, Jri; Liu, Mingchung |
國立臺灣大學 |
2008 |
A 75-GHz Phase-Locked Loop in 90-nm CMOS Technology
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Lee, Jri; Liu, Mingchung; Wang, Huaide |
國立臺灣大學 |
2008 |
Design and Comparison of Three 20-Gb/s Backplane Transceivers for Duobinary, PAM4, and NRZ Data
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Lee, Jri; Chen, Ming-Shuan; Wang, Huai-De |
國立臺灣大學 |
2006-09 |
A 20-Gb/s Adaptive Equalizer in 0.13 um CMOS Technology
|
Lee, Jri |
臺大學術典藏 |
2006-09 |
A 20-Gb/s Adaptive Equalizer in 0.13 um CMOS Technology
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Lee, Jri; Lee, Jri |
國立臺灣大學 |
2006 |
A 3-to-8-GHz fast-hopping frequency synthesizer in 0.18-μm CMOS technology
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Lee, Jri |
國立臺灣大學 |
2006 |
High-Speed Circuit Designs for Transmitters in Broadband Data Links
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Lee, Jri |
國立臺灣大學 |
2006 |
A 20-Gb/s Adaptive Equalizer in 0.13-μm CMOS Technology
|
Lee, Jri |
國立臺灣大學 |
2005-06 |
A 20-Gb/s 2-to-1 MUX and a 40-GHz VCO in 0.18-/spl mu/m CMOS technology
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Lee, Jri; Ding, Jian-Yu; Cheng, Tuan-Yi |
國立臺灣大學 |
2005-06 |
Design and analysis of a 20-GHz clock multiplication unit in 0.18-/spl mu/m CMOS technology
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Lee, Jri; Wu, Shanghann |
國立臺灣大學 |
2005-02 |
A 7-band 3-8 GHz frequency synthesizer with 1 ns band-switching time in 0.18 /spl mu/m CMOS technology
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Lee, Jri; Chiu, Da-Wei |
國立臺灣大學 |
2004-04 |
A 40-GHz Frequency Divider in 0.18-m CMOS Technology
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Lee, Jri; Razavi, Behzad |
國立臺灣大學 |
2004 |
Analysis and Modeling of Bang-Bang Clock and Data Recovery Circuits
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Lee, Jri; Kundert, K.S.; Razavi, B. |
Showing items 11-23 of 23 (1 Page(s) Totally) 1 View [10|25|50] records per page
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