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"lee kuen jong"的相关文件
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| 國立成功大學 |
2011-06 |
An Error-Tolerance-Based Test Methodology to Support Product Grading for Yield Enhancement
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Hsieh, Tong-Yu; Lee, Kuen-Jong; Breuer, Melvin A. |
| 國立成功大學 |
2011-03 |
Programmable System-on-Chip for Silicon Prototyping
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Huang, Chun-Ming; Wu, Chien-Ming; Yang, Chih-Chyau; Chen, Shih-Lun; Chen, Chi-Shi; Wang, Jiann-Jenn; Lee, Kuen-Jong; Wey, Chin-Long |
| 國立成功大學 |
2011-03 |
Effective Hybrid Test Program Development for Software-Based Self-Testing of Pipeline Processor Cores
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Lu, Tai-Hua; Chen, Chung-Ho; Lee, Kuen-Jong |
| 國立成功大學 |
2009-01 |
Turbo1500: Core-Based Design for Test and Diagnosis
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Wang, Laung-Terng; Apte, Ravi; Wu, Shianling; Sheu, Boryau; Lee, Kuen-Jong; Wen, Xiaoqing; Jone, Wen-Ben; Guo, Jianghao; Wang, Wei-Shin; Chao, Hao-Jan; Liu, Jinsong; Niu, Yanlong; Sung, Yi-Chih; Wang, Chi-Chun; Li, Fangfang |
| 國立成功大學 |
2008-03 |
An error rate based test methodology to support error-tolerance
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Hsieh, Tong-Yu; Lee, Kuen-Jong; Breuer, Melvin A. |
| 國立彰化師範大學 |
2006-04 |
A Supply-Gating Scheme for Both Data-Retention and Spike-Reduction in Power Management and Test Scheduling
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Huang, Tsung-Chu; Tzeng, Jing-Chi; Chao, Yuan-Wei; Chen, Ji-Jan; Liu, Wei-Ting; Lee, Kuen-Jong |
| 國立成功大學 |
2003-03 |
Test pattern generation and clock disabling for simultaneous test time and power reduction
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Chen, Jih-Jeen; Yang, Chia-Kai; Lee, Kuen-Jong |
| 國立成功大學 |
2002-12 |
An interleaving technique for reducing peak power in multiple-chain scan circuits during test application
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Lee, Kuen-Jong; Huang, Tsung-Chu |
| 國立彰化師範大學 |
2002-12 |
An Interleaving Technique for Reducing Peak Power in Multiple-Chain Scan Circuits During Test Application
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Lee, Kuen-Jong; Huang, Tsung-Chu |
| 國立成功大學 |
2002-09 |
A 0.5 mu m concurrent testable chip of a fifth-order g(m)-C filter
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Lee, Kuen-Jong; Wang, Wei-Chiang |
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