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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
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Institution Date Title Author
國立成功大學 2002-08 An efficient BIST method for distributed small buffers Jone, W. B.; Huang, D. C.; Wu, S. C.; Lee, Kuen-Jong
國立成功大學 2002-04 A current-mode BIST structure of DACs Wen, Yun-Che; Lee, Kuen-Jong
國立成功大學 2002-02 Untitled Lee, Kuen-Jong; Su, Chau-Chin
國立成功大學 2002-02 An efficient deterministic test pattern generator for scan-based BIST environment Wang, Wei-Lun; Lee, Kuen-Jong
國立成功大學 2001-10 An on-chip march pattern generator for testing embedded memory cores Wang, Wei-Lun; Lee, Kuen-Jong; Wang, Jhing-Fa
國立成功大學 2001-07 Reduction of power consumption in scan-based circuits during test application by an input control technique Huang, Tsung-Chu; Lee, Kuen-Jong
國立彰化師範大學 2001-07 Reduction of Power Consumption in Scan-based Circuits During Test Application by an Input Control Technique Huang, Tsung-Chu; Lee, Kuen-Jong
國立成功大學 2001-05-24 Token scan cell for low power testing Huang, Tsung-Chu; Lee, Kuen-Jong
國立彰化師範大學 2001-05 Token Scan Cell for Low Power Testing Huang, Tsung-Chu; Lee, Kuen-Jong
國立成功大學 2001-01 Analysis and generation of control and observation structures for analog circuits Wen, Yun-Che; Lee, Kuen-Jong
國立彰化師範大學 2001 A Token Scan Architecture for Low Power Testing Huang, Tsung-Chu; Lee, Kuen-Jong
國立彰化師範大學 2001 A Low-Power LFSR Architecture Huang, Tsung-Chu; Lee, Kuen-Jong
國立成功大學 2000-01 Reducing test application time by scan flip-flops sharing Chan, S. C.; Lee, Kuen-Jong; Wu, Z. Z.; Jone, W. B.
南台科技大學 2000 CMOS 電路之臨界邏輯與臨界電壓之研究 唐經洲 ; 李昆忠  ; Tang, Jing-Jou ; Lee, Kuen-Jong
國立彰化師範大學 2000 Peak-power Reduction for Multiple-scan Circuits During Test Application Lee, Kuen-Jong; Huang, Tsung-Chu; Chen, Jih-Jeen
國立成功大學 1999-12 Broadcasting test patterns to multiple circuits Lee, Kuen-Jong; Chen, Jih-Jeen; Huang, Cheng-Hua
國立成功大學 1999-04 A current-mode testable design of operational transconductance amplifier-capacitor filters Lee, Kuen-Jong; Wang, Wei-Chiang; Huang, Kou-Shung
國立彰化師範大學 1999-04 BIFEST: A Built-in Intermediate Fault Effect Sensing and Test Generation System for Cmos Bridging Faults Lee, Kuen-Jong; Tang, Jing-Jou; Huang, Tsung-Chu
南台科技大學 1999 深次微米CMOS電路之非定值錯誤測試法研究 唐經洲 ; 李昆忠 ; 陳順智 ; Tang, Jing-Jou ; Lee, Kuen-Jong ; Chen, Shung-Chih
國立彰化師範大學 1999 An Input Control Technique for Power Reduction in Scan Circuits During Test Application Huang, Tsung-Chu; Lee, Kuen-Jong
國立成功大學 1998-06-11 BIST structure for DAC testing Wen, Yun-Che; Lee, Kuen-Jong
國立彰化師範大學 1997 A High-Speed Low-Voltage Built-In Current Sensor Huang, Tsung-Chu; Huang, Min-Cheng; Lee, Kuen-Jong
國立彰化師範大學 1997 Built-In Current Sensor Designs Based on the Bulk-Driven Technique Huang, Tsung-Chu; Huang, Min-Cheng; Lee, Kuen-Jong
南台科技大學 1996-04 A built-in current sensor based on current-mode design 唐經洲 ; Tang, Jing-Jou; 李昆忠 ; Lee, Kuen-Jong; 劉濱達 ; Liu, Bin-Da
國立彰化師範大學 1996 Combination of Automatic Test Pattern Generation and Built-in Intermediate Voltage Sensing for Detecting CMOS Bridging Faults Lee, Kuen-Jong; Tang, Jing-Jou; Huang, Tsung-Chu; Tsai, Cheng-Liang

Showing items 21-45 of 45  (2 Page(s) Totally)
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