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"li hsiang pang"
Showing items 1-24 of 24 (1 Page(s) Totally)
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| 臺大學術典藏 |
2022-09-21T23:30:54Z |
DL-RSIM: A Reliability and Deployment Strategy Simulation Framework for ReRAM-based CNN Accelerators
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Lin, Wei Ting; Cheng, Hsiang Yun; CHIA-LIN YANG; Lin, Meng Yao; Lien, Kai; Hu, Han Wen; Chang, Hung Sheng; Li, Hsiang Pang; Chang, Meng Fan; Tsou, Yen Ting; Nien, Chin Fu |
| 臺大學術典藏 |
2020-05-04T08:06:49Z |
On Trading Wear-leveling with Heal-leveling.
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Chang, Yu-Ming;Chang, Yuan-Hao;Chen, Jian-Jia;Kuo, Tei-Wei;Li, Hsiang-Pang;Lue, Hang-Ting; Chang, Yu-Ming; Chang, Yuan-Hao; Chen, Jian-Jia; Kuo, Tei-Wei; Li, Hsiang-Pang; Lue, Hang-Ting; TEI-WEI KUO |
| 臺大學術典藏 |
2020-05-04T08:06:48Z |
A PCM translation layer for integrated memory and storage management.
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Chang, Bing-Jing;Chang, Yuan-Hao;Chang, Hung-Sheng;Kuo, Tei-Wei;Li, Hsiang-Pang; Chang, Bing-Jing; Chang, Yuan-Hao; Chang, Hung-Sheng; Kuo, Tei-Wei; Li, Hsiang-Pang; TEI-WEI KUO |
| 臺大學術典藏 |
2020-05-04T08:06:47Z |
A Light-Weighted Software-Controlled Cache for PCM-based Main Memory Systems.
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Chang, Hung-Sheng;Chang, Yuan-Hao;Kuo, Tei-Wei;Li, Hsiang-Pang; Chang, Hung-Sheng; Chang, Yuan-Hao; Kuo, Tei-Wei; Li, Hsiang-Pang; TEI-WEI KUO |
| 臺大學術典藏 |
2020-05-04T08:06:46Z |
How to improve the space utilization of dedup-based PCM storage devices?
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TEI-WEI KUO; Li, Hsiang-Pang; Chang, Hung-Sheng; Kuo, Tei-Wei; Chang, Yuan-Hao; Lin, Chun-Ta; Lin, Chun-Ta;Chang, Yuan-Hao;Kuo, Tei-Wei;Chang, Hung-Sheng;Li, Hsiang-Pang |
| 臺大學術典藏 |
2020-05-04T08:06:45Z |
Pattern-aware write-back strategy to minimize energy consumption of PCM-based storage systems.
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Chang, Hung-Sheng; Chang, Hung-Sheng;Chang, Yuan-Hao;Kuan, Yuan-Hung;Huang, Xiang-Zhi;Kuo, Tei-Wei;Li, Hsiang-Pang; Chang, Yuan-Hao; Kuan, Yuan-Hung; Huang, Xiang-Zhi; Kuo, Tei-Wei; Li, Hsiang-Pang; TEI-WEI KUO |
| 臺大學術典藏 |
2020-05-04T08:06:43Z |
A partnership-based approach to minimize the maximal response time of flash-memory storage systems.
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Wang, Tse-Yuan; Tsao, Che-Wei; Chang, Yuan-Hao; Kuo, Tei-Wei; Li, Hsiang-Pang; TEI-WEI KUO |
| 臺大學術典藏 |
2020-05-04T07:27:45Z |
A buffer cache architecture for smartphones with hybrid DRAM/PCM memory.
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CHIA-LIN YANG; Wang, Cheng-Yuan Michael; Li, Hsiang-Pang; Yang, Chia-Lin; Lin, Ye-Jyun; Lin, Ye-Jyun;Yang, Chia-Lin;Li, Hsiang-Pang;Wang, Cheng-Yuan Michael |
| 臺大學術典藏 |
2020-05-04T07:27:45Z |
EC-Cache: Exploiting Error Locality to Optimize LDPC in NAND Flash-Based SSDs.
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Liu, Ren-Shuo;Chuang, Meng-Yen;Yang, Chia-Lin;Li, Cheng-Hsuan;Ho, Kin-Chu;Li, Hsiang-Pang; Liu, Ren-Shuo; Chuang, Meng-Yen; Yang, Chia-Lin; Li, Cheng-Hsuan; Ho, Kin-Chu; Li, Hsiang-Pang; CHIA-LIN YANG |
| 臺大學術典藏 |
2020-05-04T07:27:42Z |
Sparse ReRAM engine: joint exploration of activation and weight sparsity in compressed neural networks.
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Yang, Tzu-Hsien;Cheng, Hsiang-Yun;Yang, Chia-Lin;Tseng, I-Ching;Hu, Han-Wen;Chang, Hung-Sheng;Li, Hsiang-Pang; CHIA-LIN YANG; Li, Hsiang-Pang; Chang, Hung-Sheng; Yang, Tzu-Hsien; Cheng, Hsiang-Yun; Yang, Chia-Lin; Tseng, I-Ching; Hu, Han-Wen |
| 臺大學術典藏 |
2019-09-09T00:55:17Z |
Sparse ReRAM engine: Joint exploration of activation and weight sparsity in compressed neural networks
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Yang, Tzu Hsien;Cheng, Hsiang Yun;Li, Hsiang Pang;CHIA-LIN YANG;Chang, Hung Sheng;Tseng, I. Ching;Hu, Han Wen; Hu, Han Wen; Tseng, I. Ching; Chang, Hung Sheng; CHIA-LIN YANG; Li, Hsiang Pang; Cheng, Hsiang Yun; Yang, Tzu Hsien |
| 國立交通大學 |
2018-08-21T05:56:54Z |
Channel-Aware Construction of Polar Codes
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Huang, Yu-Ming; Chang, Hsie-Chia; Li, Hsiang-Pang |
| 國立交通大學 |
2018-08-21T05:53:14Z |
Re-Polarization Processing in Extended Polar Codes
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Huang, Yu-Ming; Chang, Hsie-Chia; Li, Hsiang-Pang |
| 臺大學術典藏 |
2018 |
DL-RSIM: a simulation framework to enable reliable ReRAM-based accelerators for deep learning.
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Li, Hsiang-Pang; Chang, Meng-Fan; CHIA-LIN YANG; Chang, Hung-Sheng; Lin, Meng-Yao;Cheng, Hsiang-Yun;Lin, Wei-Ting;Yang, Tzu-Hsien;Tseng, I-Ching;Yang, Chia-Lin;Hu, Han-Wen;Chang, Hung-Sheng;Li, Hsiang-Pang;Chang, Meng-Fan; Lin, Meng-Yao; Cheng, Hsiang-Yun; Lin, Wei-Ting; Yang, Tzu-Hsien; Tseng, I-Ching; Yang, Chia-Lin; Hu, Han-Wen |
| 國立交通大學 |
2017-04-21T06:56:47Z |
Improving Read Performance of NAND Flash SSDs by Exploiting Error Locality
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Liu, Ren-Shuo; Chuang, Meng-Yen; Yang, Chia-Lin; Li, Cheng-Hsuan; Ho, Kin-Chu; Li, Hsiang-Pang |
| 國立交通大學 |
2017-04-21T06:56:13Z |
A Resistance Drift Compensation Scheme to Reduce MLC PCM Raw BER by Over 100x for Storage Class Memory Applications
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Khwa, Win-San; Chang, Meng-Fan; Wu, Jau-Yi; Lee, Ming-Hsiu; Su, Tzu-Hsiang; Yang, Keng-Hao; Chen, Tien-Fu; Wang, Tien-Yen; Li, Hsiang-Pang; Brightsky, Matthew; Kim, Sangbum; Lung, Hsiang-Lan; Lam, Chung |
| 國立交通大學 |
2017-04-21T06:56:07Z |
A Resistance Drift Compensation Scheme to Reduce MLC PCM Raw BER by Over 100x for Storage Class Memory Applications
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Khwa, Win-San; Chang, Meng-Fan; Wu, Jau-Yi; Lee, Ming-Hsiu; Su, Tzu-Hsiang; Yang, Keng-Hao; Chen, Tien-Fu; Wang, Tien-Yen; Li, Hsiang-Pang; Brightsky, Matthew; Kim, Sangbum; Lung, Hsiang-Lan; Lam, Chung |
| 國立交通大學 |
2017-04-21T06:49:55Z |
A Resistance-Drift Compensation Scheme to Reduce MLC PCM Raw BER by Over 100x for Storage-Class Memory Applications
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Khwa, Win-San; Chang, Meng-Fan; Wu, Jau-Yi; Lee, Ming-Hsiu; Su, Tzu-Hsiang; Yang, Keng-Hao; Chen, Tien-Fu; Wang, Tien-Yen; Li, Hsiang-Pang; BrightSky, Matthew; Kim, SangBum; Lung, Hsiang-Lam; Lam, Chung |
| 國立交通大學 |
2016-03-28T00:05:45Z |
A 45nm 6b/cell Charge-Trapping Flash Memory Using LDPC-Based ECC and Drift-Immune Soft-Sensing Engine
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Ho, Kin-Chu; Fang, Po-Chao; Li, Hsiang-Pang; Wang, Cheng-Yuan Michael; Chang, Hsie-Chia |
| 臺大學術典藏 |
2016 |
A disturbance-aware sub-block design to improve reliability of 3D MLC flash memory.
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Chang, Hung-Sheng;Chang, Yuan-Hao;Kuo, Tei-Wei;Chang, Yu-Ming;Li, Hsiang-Pang; TEI-WEI KUO; Li, Hsiang-Pang; Chang, Yu-Ming; Kuo, Tei-Wei; Chang, Yuan-Hao; Chang, Hung-Sheng |
| 臺大學術典藏 |
2015 |
Fine-grained write scheduling for PCM performance improvement under write power budget.
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CHIA-LIN YANG; Li, Hsiang-Pang; Lai, Chun-Hao;Yu, Shun-Chih;Yang, Chia-Lin;Li, Hsiang-Pang; Lai, Chun-Hao; Yu, Shun-Chih; Yang, Chia-Lin |
| 臺大學術典藏 |
2015 |
Achieving SLC performance with MLC flash memory.
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Li, Hsiang-Pang; TEI-WEI KUO; Li, Yung-Chun; Kuo, Tei-Wei; Chang, Yu-Ming; Chang, Yuan-Hao; Chang, Yu-Ming;Chang, Yuan-Hao;Kuo, Tei-Wei;Li, Yung-Chun;Li, Hsiang-Pang |
| 臺大學術典藏 |
2015 |
On Relaxing Page Program Disturbance over 3D MLC Flash Memory.
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Chang, Yuan-Hao; Li, Yung-Chun; Chang, Yu-Ming; Chang, Yu-Ming;Li, Yung-Chun;Chang, Yuan-Hao;Kuo, Tei-Wei;Hsieh, Chih-Chang;Li, Hsiang-Pang; TEI-WEI KUO; Li, Hsiang-Pang; Hsieh, Chih-Chang; Kuo, Tei-Wei |
| 臺大學術典藏 |
2013 |
A disturb-alleviation scheme for 3D flash memory.
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Li, Yung-Chun; TEI-WEI KUO; Chang, Yu-Ming;Chang, Yuan-Hao;Kuo, Tei-Wei;Li, Hsiang-Pang;Li, Yung-Chun; Chang, Yu-Ming; Chang, Yuan-Hao; Kuo, Tei-Wei; Li, Hsiang-Pang |
Showing items 1-24 of 24 (1 Page(s) Totally)
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