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Showing items 1-9 of 9 (1 Page(s) Totally)
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| 國立交通大學 |
2018-08-21T05:56:39Z |
A Numerical Study of Si-TMD Contact with n/p Type Operation and Interface Barrier Reduction for Sub-5 nm Monolayer MoS2 FET
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Tang, Ying-Tsan; Li, Kai-Shin; Li, Lain-Jong; Li, Ming-Yang; Lin, Chang-Hsien; Chen, Yi-Ju; Chen, Chun-Chi; Su, Chuan-Jung; Wu, Bo-Wei; Wu, Cheng-San; Chen, Min-Cheng; Shieh, Jia-Min; Yeh, Wen-Kuan; Su, Po-Cheng; Wang, Tahui; Yang, Fu-Liang; Hu, Chenming |
| 國立交通大學 |
2018-08-21T05:56:39Z |
First Fully Functionalized Monolithic 3D(+) IoT Chip with 0.5 V Light-electricity Power Management, 6.8 GHz Wireless-communication VCO, and 4-layer Vertical ReRAM
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Hsueh, Fu-Kuo; Shen, Chang-Hong; Shieh, Jia-Min; Li, Kai-Shin; Chen, Hsiu-Chih; Huang, Wen-Hsien; Wang, Hsing-Hsiang; Yang, Chih-Chao; Hsieh, Tung-Ying; Lin, Chang-Hsien; Chen, Bo-Yuan; Shiao, Yu-Shao; Huang, Guo-Wei; Wong, Oi-Ying; Chen, Po-Hung; Yeh, Wen-Kuan |
| 國立交通大學 |
2017-04-21T06:50:15Z |
MOS2 U-shape MOSFET with 10 nm Channel Length and Poly-Si Source/Drain Serving as Seed for Full Wafer CVD MOS2 Availability
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Li, Kai-Shin; Wu, Bo-Wei; Li, Lain-Jong; Li, Ming-Yang; Cheng, Chia-Chin Kevin; Hsu, Cho-Lun; Lin, Chang-Hsien; Chen, Yi-Ju; Chen, Chun-Chi; Wu, Chien-Ting; Chen, Min-Cheng; Shieh, Jia-Min; Yeh, Wen-Kuan; Chueh, Yu-Lun; Yang, Fu-Liang; Hu, Chenming |
| 國立交通大學 |
2017-04-21T06:50:09Z |
Silicide Barrier Engineering Induced Random Telegraph Noise in 1Xnm CMOS Contacts
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Chen, Min-Cheng; Lin, Chia-Yi; Chen, Bo-Yuan; Lin, Chang-Hsien; Huang, Guo-Wei; Huang, Chien-Chao; Ho, ChiaHua; Wang, Tahui; Hu, Chenming; Yang, Fu-Liang |
| 國立交通大學 |
2017-04-21T06:49:47Z |
Estimating the Detection Stability of a Si Nanowire Sensor Using an Additional Charging Electrode
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Chen, Min-Cheng; Chen, Hsiao-Chien; Lee, Ta-Hsien; Lin, Yu-Hsien; Shih, Jyun-Hung; Wang, Bo-Wei; Hou, Yun-Fang; Chen, Yi-Ju; Lin, Chia-Yi; Lin, Chang-Hsien; Hsieh, Yi-Ping; Ho, ChiaHua; Hua, Mu-Yi; Qiu, Jian-Tai; Wang, Tahui; Yang, Fu-Liang |
| 國立交通大學 |
2017-04-21T06:49:14Z |
Hybrid Si/TMD 2D Electronic Double Channels Fabricated Using Solid CVD Few-Layer-MoS2 Stacking for V-th Matching and CMOS-Compatible 3DFETs
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Chen, Min-Cheng; Lin, Chia-Yi; Li, Kai-Hsin; Li, Lain-Jong; Chen, Chang-Hsiao; Chuang, Cheng-Hao; Lee, Ming-Dao; Chen, Yi-Ju; Hou, Yun-Fang; Lin, Chang-Hsien; Chen, Chun-Chi; Wu, Bo-Wei; Wu, Cheng-San; Yang, Ivy; Lee, Yao-Jen; Yeh, Wen-Kuan; Wang, Tahui; Yang, Fu-Liang; Hu, Chenming |
| 國立交通大學 |
2017-04-21T06:48:18Z |
TMD FinFET with 4 nm Thin Body and Back Gate Control for Future Low Power Technology
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Chen, Min-Cheng; Li, Kai-Shin; Li, Lain-Jong; Lu, Ang-Yu; Li, Ming-Yang; Chang, Yung-Huang; Lin, Chang-Hsien; Chen, Yi-Ju; Hou, Yun-Fang; Chen, Chun-Chi; Wu, Bo-Wei; Wu, Cheng-San; Yang, Ivy; Lee, Yao-Jen; Shieh, Jia-Min; Yeh, Wen-Kuan; Shih, Jyun-Hong; Su, Po-Cheng; Sachid, Angada B.; Wang, Tahui; Yang, Fu-Liang; Hu, Chenming |
| 國立交通大學 |
2014-12-08T15:22:46Z |
Random Telegraph Noise in 1X-nm CMOS Silicide Contacts and a Method to Extract Trap Density
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Chen, Min-Cheng; Lin, Chia-Yi; Chen, Bo-Yuan; Lin, Chang-Hsien; Huang, Guo-Wei; Ho, Chia-Hua; Wang, Tahui; Hu, Chenming; Yang, Fu-Liang |
| 國立臺灣大學 |
2012 |
Sub fM DNA sensitivity by self-aligned maskless thin-film transistor-based SoC bioelectronics
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Chen, Min-Cheng; Lin, Chang-Hsien; Lin, Chia-Yi; Hsueh, Fu-Kuo; Huang, Wen-Hsien; Lien, Yu-Chung; Chen, Hsiu-Chih; Hsueh, Hsiao-Ting; Huang, Che-Wei; Lin, Chih-Ting; Liu, Yin-Chih; Lee, Ta-Hsien; Hua, Mu-Yi; Qiu, Jian-Tai; Liu, Mao-Chen; Lee, Yao-Jen; Shieh, Jia-Min; Ho, ChiaHua; Hu, Chenming; Yang, Fu-Liang |
Showing items 1-9 of 9 (1 Page(s) Totally)
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